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Passivation of copper interconnect surfaces with a passivating metal layer 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
출원번호 US-0222275 (1998-12-28)
발명자 / 주소
  • Chan Lap
  • Yap Kuan Pei,MYX
  • Tee Kheng Chok,MYX
  • Ip Flora S.,SGX
  • Loh Wye Boon,MYX
출원인 / 주소
  • Institute of Microelectronics, SGX
대리인 / 주소
    Saile
인용정보 피인용 횟수 : 78  인용 특허 : 9

초록

An interconnect line on an IMD layer on a semiconductor device is formed in an interconnect hole in the IMD layer. The interconnect hole has walls and a bottom in the IMD layer. A diffusion barrier is formed on the walls and the bottom of the hole. Fill the interconnect hole with a copper metal line

대표청구항

[ Having thus described the invention, what is claimed as new and desirable to be secured by Letters Patent is as follows:] [8.] A method of forming an interconnect line on an IMD layer with a top surface on a substrate comprising:forming an interconnect trench hole in said IMD layer, said interconn

이 특허에 인용된 특허 (9)

  1. Weng Jiue Wen,TWX ; Shiue Ruey-Yun,TWX, Method for making metal capacitors for deep submicrometer processes for semiconductor integrated circuits.
  2. Shinriki Hiroshi (Chiba JPX) Kaizuka Takeshi (Chiba JPX) Takeyasu Nobuyuki (Chiba JPX) Ohta Tomohiro (Chiba JPX) Kondoh Eiichi (Chiba JPX) Yamamoto Hiroshi (Chiyoda-ku JPX) Katagiri Tomoharu (Chiyoda, Method for making metal interconnection with chlorine plasma etch.
  3. Venkatraman Ramnath (Austin TX), Method of alloying an interconnect structure with copper.
  4. Xu Zheng (Foster City CA) Yao Tse-Yong (Sunnyvale CA) Kieu Hoa (Sunnyvale CA) Aranovich Julio (Palo Alto CA), Method of filling of contact openings and vias by self-extrusion of overlying compressively stressed matal layer.
  5. Bollinger Cheryl A. (Orlando FL) Dein Edward A. (Horsham PA) Merchant Sailesh M. (Orlando FL) Nanda Arun K. (Austin TX) Roy Pradip K. (Orlando FL) Wilkins ; Jr. Cletus W. (Orlando FL), Method of making multilayered Al-alloy structure for metal conductors.
  6. Mu Xiao-Chun (Saratoga CA) Sivaram Srinivasan (San Jose CA) Gardner Donald S. (Mountain View CA) Fraser David B. (Danville CA), Methods of forming an interconnect on a semiconductor substrate.
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