이 특허에 인용된 특허 (33) 인용/피인용 타임라인 분석

1. Van Roosmalen Marcel Wilhelm Rudolf Martin,NLX, Balanced integrated semiconductor device operating with a parallel resonator circuit.

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2. Szente Pedro A. (Los Altos CA) Armstrong Gratz L. (Sunnyvale CA), Broad-band microwave power sensor using diodes above their resonant frequency.

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3. Takekawa Kouichi (Tokyo JPX) Bonkohara Manabu (Tokyo JPX), Capacitor built-in integrated circuit packaged unit and process of fabrication thereof.

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4. Hu Yung-Chang,TWX ; Ma Tsuo-Hsin,TWX, Design of device layout for integration with power mosfet packaging to achieve better lead wire connections and lower o.

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5. Nilssen Ole K. (Caesar Dr. Barrington IL 60010), Electronic ballast with leakage transformer.

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6. Chillara Satya (San Jose CA) Mostafazadeh Shahram (San Jose CA), High density integrated circuit assembly combining leadframe leads with conductive traces.

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7. Mitzlaff James E. (Carpentersville IL), High efficiency RF power amplifier.

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8. Rush Kenneth, High-density wirebond chip interconnect for multi-chip modules.

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9. Kagawa Kazuhisa (Itami JPX), High-frequency high-power transistor.

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10. Hale Raymond L. (Torrance CA), Hybrid transistor.

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11. Crook David T. (Loveland CO) Keirn Kevin W. (Loveland CO) Cilingiroglu Ugur (Goztepe TRX), Identification of pin-open faults by capacitive coupling through the integrated circuit package.

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12. Penchuk Robert A., Integrated circuit and supply decoupling capacitor therefor.

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13. Fryklund David John ; Schwab Paul John ; Wells Graham John Headlem, Integrated circuit having a parasitic resonance filter.

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14. Fritz Donald S., Integrated circuit package.

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15. Choi Chi-Young,KRX, Lead frame bonding power distribution systems.

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16. Liang Louis H. (Los Altos CA) Wang Tsing-Chow (San Jose CA), Leadframe having one or more power/ground planes without vias.

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17. Inoue Akira (Itami JPX), Microwave integrated circuit.

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18. Kain Aron Z. (1733 Corning St. Los Angeles CA 90035), Microwave vector displacement and acceleration transducer.

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19. Wendler John P. (Brighton MA) Palevsky Alan (Wayland MA), Monolithic lumped element networks.

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20. Khatibzadeh M. Ali (Plano TX) Bayraktaroglu Burhan (Plano TX), Monolithically realizable radio frequency bias choke.

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21. Kinsman Larry D., Multilayered lead frame for semiconductor packages.

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22. Wu Ching-Yi,TWX, Multiple-chip integrated circuit package including a dummy chip.

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23. Miyahara Kenichiro (Tokuyama JPX), Package for semiconductor device.

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24. Lenz Michael,DEX, Power semiconductor component.

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25. Nerone Louis R. (Brecksville OH), Power supply circuit for a gas discharge lamp.

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26. Shields Michael R. (Mesa AZ), RF amplifier assembly.

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27. Yoshikawa Noriyuki,JPX ; Tateoka Kazuki,JPX ; Sugimura Akihisa,JPX ; Kanazawa Kunihiko,JPX, RF power amplifying circuit device.

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28. Tsuji Kazuto (Kawasaki JPX) Yoneda Yoshiyuki (Kawasaki JPX) Sakoda Hideharu (Kawasaki JPX) Sono Michio (Kawasaki JPX) Yamaguchi Ichiro (Kawasaki JPX) Hamano Toshio (Kawasaki JPX) Kubota Yoshihiro (Ka, Semiconductor device and lead frame therefore.

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29. Yoneda Yoshiyuki (Kawasaki JPX) Tsuji Kazuto (Kawasaki JPX) Kasai Junichi (Kawasaki JPX) Sakoda Hideharu (Kawasaki JPX), Semiconductor device and method of producing the same.

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30. Nagano Junya (Kanagawa JPX), Semiconductor device having an interconnecting circuit board.

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31. Nagano Junya (Kanagawa-ken JPX), Semiconductor device having an interconnecting circuit board.

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32. Nagano Junya (Kanagawa-ken JPX), Semiconductor device having an interconnecting circuit board and method for manufacturing same.

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33. Shioya Masaki (Tokyo JPX) Hanawaka Masuo (Tokyo JPX), Switching power supply.

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이 특허를 인용한 특허 (24) 인용/피인용 타임라인 분석

1. Van Horn,Mark T.; Hedden,Richard N.; Cuthbert,David R.; Schoenfeld,Aaron M., Apparatus and methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer.

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2. Van Horn,Mark T.; Hedden,Richard N.; Cuthbert,David R.; Schoenfeld,Aaron M., Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer.

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3. Van Horn,Mark T.; Hedden,Richard N.; Cuthbert,David R.; Schoenfeld,Aaron M., Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer.

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4. Van Horn,Mark T.; Hedden,Richard N.; Cuthbert,David R.; Schoenfeld,Aaron M., Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer.

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5. Van Horn,Mark T.; Hedden,Richard N.; Cuthbert,David R.; Schoenfeld,Aaron M., Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer.

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6. Jin,Xiaodong; Sutardja,Sehat; Tse,Lawrence; Tsai,King Chun, ESD protection circuit.

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7. Kluge,Wolfram; Huschka,Andreas; Hahn,Uwe, ESD protection circuit for radio frequency input/output terminals in an integrated circuit.

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8. Jin, Xiaodong; Sutardja, Sehat; Tse, Lawrence; Tsai, King Chun, Electrostatic discharge protection circuit.

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9. Bromberger, Christoph, High frequency arrangement.

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10. Wight, James Stuart; Grundlingh, Johan M., Integrated circuit incorporating wire bond inductance.

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11. Wight, James Stuart; Grundlingh, Johan M., Integrated circuit incorporating wire bond inductance.

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12. Wight,James Stuart; Grundlingh,Johan M., Integrated circuit incorporating wire bond inductance.

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13. Santos, Fernando A.; Sanchez, Audel A.; Viswanathan, Lakshminarayan, Method and apparatus for multi-chip structure semiconductor package.

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14. Jin, Xiaodong; Tse, Lawrence; Tsai, King Chun; Chien, George; Wei, Shuran, Methods and apparatus for improving high frequency input/output performance.

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15. Jin, Xiaodong; Tse, Lawrence; Tsai, King Chun; Chien, George; Wei, Shuran, Methods and apparatus for improving high frequency input/output performance.

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16. Jin,Xiaodong; Tse,Lawrence; Tsai,King Chun; Chien,George; Wei,Shuran, Methods and apparatus for improving high frequency input/output performance.

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17. Jin,Xiaodong; Tse,Lawrence; Tsai,King Chun; Chien,George; Wei,Shuran, Methods and apparatus for improving high frequency input/output performance.

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18. Van Horn,Mark T.; Hedden,Richard N.; Cuthbert,David R.; Schoenfeld,Aaron M., Methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer.

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19. Van Horn,Mark T.; Hedden,Richard N.; Cuthbert,David R.; Schoenfeld,Aaron M., Methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer.

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20. Terrovitis, Manolis, On-chip/off-chip magnetic shielding loop.

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21. Kawahara,Hirokazu, Semiconductor IC, information processing method, information processing device, and program storage medium.

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22. Wight, James Stuart; Grundlingh, Johan M., Switched-mode power amplifier integrally performing power combining.

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23. Ben Artsi, Liav, System and process for overcoming wire-bond originated cross-talk.

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24. Ben Artsi,Liav, System and process for overcoming wire-bond originated cross-talk.

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