[특허]Method and apparatus for improving die planarity and global uniformity of semiconductor wafers in a chemical mechanical polishing context

[미국특허] Method and apparatus for improving die planarity and global uniformity of semiconductor wafers in a chemical mechanical polishing context 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	B24B-001/00
출원번호	US-0097914 (1998-06-16)
발명자 / 주소	Kim Inki Xu Jim
출원인 / 주소	Hewlett-Packard Company
대리인 / 주소	Snell & Wilmer, LLP
인용정보	피인용 횟수 : 28 인용 특허 : 27

초록 ▼

The present invention provides methods and apparatus for optimizing the removal of thin film layers during planarization of a semiconductor wafer to achieve global uniformity of the entire semiconductor surface while further achieving the planarity within an individual die structure. A wafer polishing system suitably comprises a wafer polishing apparatus, a controller and a wafer polishing recipe. The wafer polishing recipe may be comprised of various operational parameters utilized for controlling the operation of the polishing apparatus. In a preferred embodiment, the wafer polishing apparatus is initiated with a low down force applied by a carrier apparatus and a high polishing speed applied by a polishing surface to facilitate removal of the thin film layer and optimize the planarity within a single die structure, and then followed with a high down force applied by the carrier apparatus and a low polishing speed applied by the polishing surface to facilitate removal of the thin film layer to optimize the global uniformity of the entire wafer surface. Alternatively, the low down force--high polishing speed and high down force--low polishing speed steps may be reversed without departing from the scope of the invention.

대표청구항 ▼

[ What is claimed is:] [1.] A method for polishing a surface of a semiconductor wafer comprising the steps of:selecting a first rotational speed for a polishing surface and a first down force to be applied between the wafer and said polishing surface;applying said first rotational speed and said first down force to polish the surface of the semiconductor wafer;selecting a second rotational speed for said polishing surface and a second down force to be applied between the wafer and said polishing surface, wherein said second rotational speed is slower than said first rotational speed and said second down force is greater than said first down force; andapplying said second rotational speed and said second down force to further polish the surface of the semiconductor wafer.

이 특허에 인용된 특허 (27) 인용/피인용 타임라인 분석

Allen Robert F. ; Holzapfel Paul ; Bartels Anthony L. ; Lin Warren, Apparatus for the in-process detection of workpieces in a CMP environment.
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Kim Yong-Kwon,KRX ; Jun Young-Kwon,KRX, Chemical mechanical polishing apparatus for semiconductor wafer.
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Salugsugan Isidore (Fremont CA), Chemical-mechanical polishing of thin materials using a pulse polishing technique.
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Kishimoto Koji (Tokyo JPX) Homma Tetsuya (Tokyo JPX), Fabrication process for multilevel interconnections in a semiconductor device.
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Arai Hatsuyuki (Zama JPX) Nagahashi Isao (Fujisawa JPX) Maeda Seiichi (Ayase JPX) Yasuda Kazumi (Zama JPX) Furusawa Shiro (Fujisawa JPX) Hirata Kazuhiko (Sagamihara JPX) Nagao Kastunori (Ayase JPX) K, Flat lapping machine.
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Arai Hatsuyuki (Zama JPX) Sugiyama Misuo (Hadano JPX), Flat lapping machine with sizing mechanism.
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Sahota Kashmir S. (Fremont CA), High removal rate chemical-mechanical polishing.
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Talieh Homayoun (Santa Clara County CA) Weldon David Edwin (Santa Cruz County CA), Linear polisher and method for semiconductor wafer planarization.
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Doan Trung T. (Boise ID) Grief Malcolm (Boise ID) Schultz Laurence D. (Boise ID), Method for chemical planarization (CMP) of a semiconductor wafer to provide a planar surface free of microscratches.
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Dawson Robert (Austin TX), Method for planarizing an integrated circuit topography.
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Noguchi Masahiro (Ushiku JPX) Yamamoto Osamu (Ushiku JPX), Method for polishing AlGaAs surfaces.
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Doan Trung T. (Boise ID) Yu Chris C. (Boise ID), Multiple step method of chemical-mechanical polishing which minimizes dishing.
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Morioka Izuru (Tokyo JPX) Kuwano Kenji (Tokyo JPX), Polishing apparatus.
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Morioka Izuru (Tokyo JPX) Yui Kiyoshi (Tokyo JPX), Polishing apparatus.
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Nakamura Yoshio (Nagano JPX), Polishing machine.
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Baldy Andr (Seyssins FRX) Barrois Grard (Le Fontanil FRX) Blanc Henri (Saint Julien de Ratz FRX) Dominiak Marcel (Grenoble FRX), Polishing machine having a taut microabrasive strip and an improved wafer support head.
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Burke Peter A. (Milton VT) Leach Michael A. (Milpitas CA), Polishstop planarization structure.
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Tsuchiya Toshihiro,JPX ; Tanaka Kouichi,JPX ; Hashimoto Kiromasa,JPX ; Morita Kouji,JPX ; Takaku Tsutomu,JPX, Process of polishing wafers.
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Runnels Scott (Austin TX) Eyman L. Michael (San Antonio TX), Pulsed-force chemical mechanical polishing.
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Hirose Masayoshi (Tokyo JPX) Ishikawa Seiji (Tokyo JPX) Kimura Norio (Tokyo JPX) Sasaki Yoshimi (Tokyo JPX) Yamada Kouki (Tokyo JPX) Aoyama Fujio (Tokyo JPX) Shimizu Noburu (Tokyo JPX) Okumura Katsuy, Revolving drum polishing apparatus.
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Hileman Harold J. (Kirkwood MO) Walsh Robert J. (Ballwin MO) Walsh Thomas A. (Templeton CA), Semiconductor wafer polishing appartus and method.
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Sandhu Gurtej S. (Boise ID) Doan Trung T. (Boise ID), System and method for real-time control of semiconductor a wafer polishing, and a polishing head.
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Meyer Anthony S. ; Mallon Thomas G. ; Withers Bradley ; Young Douglas W., Technique for improving within-wafer non-uniformity of material removal for performing CMP.
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Leonard Thomas E. (Morris Plains NJ) Pagano John C. (Totowa NJ), Wafer grinding machine.
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Karlsrud Chris E. (Chandler AZ) Van Woerkom Anthony G. (Chandler AZ) Odagiri Shigeru (Yokohama JPX) Nagahashi Isao (Fujisawa AZ JPX) Preston Spencer (Chandler AZ), Wafer polishing method and apparatus.
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Karlsrud Chris E. (Chandler AZ) Van Woerkom Anthony G. (Chandler AZ) Odagiri Shigeru (Yokohama JPX) Nagahashi Isao (Fujisawa JPX), Wafer polishing method and apparatus.
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Karlsrud Chris E. (Chandler AZ) Van Woerkom Anthony G. (Chandler AZ) Odagiri Shigeru (Yokohama JPX) Nagahashi Isao (Fujisawa JPX), Wafer polishing method and apparatus.
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Williams, Damon Vincent, Methods for controlling retaining ring and wafer head tilt for chemical mechanical polishing.
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Chen,Yufei; Sun,Lizhong; Lee,Doohan; Hsu,Wei Yung, Methods for reducing delamination during chemical mechanical polishing.
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Kakita, Shinichiro, Polishing method and polishing apparatus permitting control of polishing time at a high accuracy.
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Saldana, Miguel A.; Boyd, John M.; Gotkis, Yehiel; Owczarz, Aleksander A., Subaperture chemical mechanical polishing system.
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[미국특허] Method and apparatus for improving die planarity and global uniformity of semiconductor wafers in a chemical mechanical polishing context 원문보기