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Methods for shallow trench isolation 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/762
  • H01L-021/316
출원번호 US-0746631 (1996-11-13)
발명자 / 주소
  • Yieh Ellie
  • Xia Li-Qun
  • Nemani Srinivas
출원인 / 주소
  • Applied Materials, Inc.
대리인 / 주소
    Townsend Townsend & Crew
인용정보 피인용 횟수 : 77  인용 특허 : 18

초록

The present invention provides systems, methods and apparatus for high temperature (at least about 500-800.degree. C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce to

대표청구항

[ What is claimed is:] [1.] A process for depositing an insulating layer on a substrate having at least one gap, said substrate being disposed on a heater in a chamber, said process comprising the steps of:raising said heater to a temperature of at least about 500.degree. C.;pressurizing said chambe

이 특허에 인용된 특허 (18)

  1. Wang David N. (Cupertino CA) White John M. (Hayward CA) Law Kam S. (Union City CA) Leung Cissy (Union City CA) Umotoy Salvador P. (Pittsburg CA) Collins Kenneth S. (San Jose CA) Adamik John A. (San R, CVD of silicon oxide using TEOS decomposition and in-situ planarization process.
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  16. Jang Syun-Ming,TWX ; Chen Ying-Ho,TWX ; Yu Chen-Hua,TWX, Shallow trench isolation (STI) method employing gap filling silicon oxide dielectric layer.
  17. Wang David N. (Cupertino) White John M. (Hayward) Law Kam S. (Union City) Leung Cissy (Union City) Umotoy Salvador P. (Pittsburg) Collins Kenneth S. (San Jose) Adamik John A. (San Ramon) Perlov Ilya , Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planar.
  18. Wang David N-K. (Cupertino CA) White John M. (Hayward CA) Law Kam S. (Union City CA) Leung Cissy (Union City CA) Umotoy Salvador P. (Pittsburg CA) Collins Kenneth S. (San Jose CA) Adamik John A. (San, Thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process.

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