System for flushing high-speed serial link buffers by ignoring received data and using specially formatted requests and responses to identify potential failure
원문보기
IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0123993
(1998-07-29)
|
우선권정보 |
FR-0009817 (1997-07-31) |
발명자
/ 주소 |
- Abily Jack,FRX
- Qian Yu Jun Jean,FRX
|
출원인 / 주소 |
|
대리인 / 주소 |
Miles & Stockbridge P.C.Kondracki
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인용정보 |
피인용 횟수 :
5 인용 특허 :
4 |
초록
▼
A process and system for flushing high-speed buffers in a serial link used between a mover circuit (4) that executes data move operations and at least two memories through at least two channels (400, 401), the data move operations each being constituted by a move request followed by the return of a
A process and system for flushing high-speed buffers in a serial link used between a mover circuit (4) that executes data move operations and at least two memories through at least two channels (400, 401), the data move operations each being constituted by a move request followed by the return of a response or acknowledgement of the request, cyclically with interlacing, the responses following the same pair of serial channels (400, 401) as the requests for which they constitute the acknowledgements. The process comprises:
대표청구항
▼
[ What is claimed is:] [1.] A process for flushing high-speed buffers in a serial link including two-way communication channels used between a mover circuit (4) executing read and write data move operations and at least two memories (12a, 12c), the mover circuit being linked to each memory (12a, 12c
[ What is claimed is:] [1.] A process for flushing high-speed buffers in a serial link including two-way communication channels used between a mover circuit (4) executing read and write data move operations and at least two memories (12a, 12c), the mover circuit being linked to each memory (12a, 12c) by at least two two-way channels (400, 401), the data move operations each being constituted by a move request followed by the return of a response or acknowledgement of the request, the mover circuit using the two two-way channels (400, 401) to cyclically link the mover circuit to a memory (12a, 12c) with interleaving, for the same operation, each channel (400, 401) being adapted to maintain the order in which the requests, and respectively the responses, of the same request stream and respectively the same response stream are sent, the responses following the same pair of channels (400, 401) as the responses for which they constitute the acknowledgements, characterized in that the process comprises the following steps:placing the mover circuit (4) into an "absorption" mode of operation in which the responses are accepted independent of any order of arrival through the channels (400, 401) and are ignored by the mover circuit (4),generating a specific write request and a specific read request in at least some of the channels (400, 401) establishing a serial link, the specific requests having no effect on the memories (12a, 12c) and each request comprising a "barrier" marker contained in a control character preceding and/or following the specific request, the barrier marker also being contained in a control character associated with a response corresponding to each specific request,accumulating the received responses comprising a barrier marker, andcomparing the received responses comprising a barrier marker with the specific requests generated, so as to either locate a potential failure in the case where the expected responses for a barrier marker are missing, or to recognize that flushing of the channels (400, 401) has been carried out in the case where all of the expected responses with a barrier marker have been received.
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이 특허를 인용한 특허 (5)
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Kumar, Sanjay K.; Sankaran, Rajesh M.; Dulloor, Subramanya R.; Anderson, Andrew V., Instruction and logic for flush-on-fail operation.
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Kumar, Sanjay; Sankaran, Rajesh M.; Dulloor, Subramanya R.; Anderson, Andrew V., Instruction and logic for flush-on-fail operation.
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Kumar, Sanjay; Sankaran, Rajesh M.; Dulloor, Subramanya R.; Anderson, Andrew V., Instruction and logic for flush-on-fail operation.
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Cherkauer, Kevin J.; Lashley, Scott D.; McInnis, Dale M.; Ofer, Effi; Pearson, Steven R., Log shipping data replication with parallel log writing and log shipping at the primary site.
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Cherkauer, Kevin J.; Pearson, Steven R.; Xue, Xun; Zheng, Roger L. Q., Log-shipping data replication with early log record fetching.
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