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High density and high speed magneto-electronic logic family 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-007/38
출원번호 US-0074576 (1998-05-07)
발명자 / 주소
  • Johnson Mark B.
대리인 / 주소
    Law+
인용정보 피인용 횟수 : 48  인용 특허 : 45

초록

A number of novel new devices and circuits are disclosed utilizing configurable magneto-electronic elements such as magnetic spin transistors and hybrid hall effect devices. Such magneto-electronic elements can be used as building blocks of an entirely new family of electronic devices for performing

대표청구항

[ What is claimed is:] [1.] An electronic device for performing a logic operation based on a first input signal and a second input signal, said device comprising:an input for receiving said first and second input signals; andan electronically configurable element, which element has a logic state tha

이 특허에 인용된 특허 (45)

  1. Rao Devulapalli V. G. L. N. ; Aranda Francisco J. ; Rao Desai Narayana,INX ; Akkara Joseph A. ; Roach Joseph F. ; Chen Zhongping, All-optical devices.
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  4. Andersen David R. (Solon IA) Cuykendall Robert R. (Iowa City IA), Digital optical interaction gate.
  5. Casselman Steven Mark (Reseda CA), FPGA virtual computer for executing a sequence of program instructions by successively reconfiguring a group of FPGA in.
  6. Mor Yeshayahu (Cupertino CA) Schatzberger Yeshayahu (Haifa CA ILX) Sandman Leonardo (Cupertino CA), Fast shifter method and structure.
  7. Hennig Falke (10149 Adriana Ave. Cupertino CA 95014), Hall effect modulation of resistor values.
  8. Spitzer Richard (1214 Oxford St. Berkeley CA 94709), High resolution imaging and measuring dynamic surface effects of substrate surfaces.
  9. Liu Lin-Shih (Fremont CA) Raza Syed B. (Sunnyvale CA) Nazarian Hagop (San Jose CA) Ansel George M. (Starkville MS) Douglass Stephen M. (Saratoga CA) Hunt Jeffery S. (Ackerman MS), High speed configuration independent programmable macrocell.
  10. Taylor Brad (Oakland CA), Implementation of a selected instruction set CPU in programmable hardware.
  11. Gilson Kent L. (255 N. Main St. ; Apt. 210 Salt Lake City UT 84115), Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfi.
  12. Gilson Kent L. (Salt Lake City UT), Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfi.
  13. Evans Joseph T. (Albuquerque NM) Bullington Jeff A. (Albuquerque NM), Light actuated optical logic device.
  14. Luryi Sergey (Bridgewater NJ) Pinto Mark R. (Morristown NJ), Logic element and article comprising the element.
  15. Ovshinsky Stanford R. (Bloomfield Hills MI), Logical operation circuit employing two-terminal chalcogenide switches.
  16. Popovic Radivoje (Steinhausen CHX) Berchier Jean-Luc (Menzingen CHX) Schneider Gernot (Baar CHX) Lienhard Heinz (Zug CHX) Baltes Heinrich P. (Edmonton CAX) Solt Katalin (Zug CHX) Zajc Tomislav (Zug C, Magnetic field sensor.
  17. Brady Michael J. (Brewster NY) Gambino Richard J. (Yorktown Heights NY) Krusin-Elbaum Lia (Dobbs Ferry NY) Ruf Ralph R. (New City NY), Magnetic non-volatile random access memory.
  18. Johnson Mark B. (Holmdel NJ), Magnetic spin transistor.
  19. Brady Michael J. (Star Ridge Manor NY) Dana Stephane S. (New York NY) Gambino Richard J. (Yorktown Heights NY), Magnetostrictive/electrostrictive thin film memory.
  20. Daughton James M. (Edina MN) Pohm Arthur V. (Ames IA), Method for forming offset magnetoresistive memory structures.
  21. Larson William L. (Colorado Springs CO), Method for making a ferroelectric memory cell with a ferroelectric capacitor overlying a memory transistor.
  22. Pohm Arthur V. (Ames IA), Method for sensing data in a magnetoresistive memory using large fractions of memory cell films for data storage.
  23. Spitzer Richard (1214 Oxford St. Berkeley CA 94709), Microstructure array and activation system therefor.
  24. Coffey Kevin R. (San Jose CA) Fontana Robert E. (San Jose CA) Howard James K. (Morgan Hill CA) Hylton Todd L. (San Jose CA) Parker Michael A. (Fremont CA) Tsang Ching H. (Sunnyvale CA), Multilayer magnetoresistive sensor.
  25. Katti Romney R. (Pasadena CA) Stadler Henry L. (La Canada CA) Wu Jiin-Chuan (San Gabriel CA), Non-volatile magnetic random access memory.
  26. Matthews James A. (Milpitas CA), Non-volatile memory cell.
  27. Wu Jiin-Chuan (Feng Shan CA TWX) Stadler Henry L. (Berkeley CA) Katti Romney R. (Pasadena CA), Nonvolatile random access memory.
  28. Daughton James M. (Edina MN) Pohm Arthur V. (Ames IA), Offset magnetoresistive memory structures.
  29. Falk R. A. (Renton WA), Optical and gate for use in a cross-bar arithmetic/logic unit.
  30. Crossland William A. (Harlow GB3) Collings Neil (Epping GB3), Optical logic device.
  31. Imanishi Yasuo,JPX ; Ishihara Shingo,JPX ; Hamada Tomoyuki,JPX ; Kakuta Atsushi,JPX, Optical memory device and optical circuit using optical memory device.
  32. Bergman Larry A. (Van Nuys CA), Optically intraconnected computer employing dynamically reconfigurable holographic optical element.
  33. Hood ; Jr. Milton M. (Lake Oswego OR) Rutledge David L. (Newberg OR) Shankar Kapil (San Jose CA) Usselmann Rudolf (Mountain View CA), Output logic macrocell.
  34. Batcher Kenneth E. (Stow OH), Processing element for parallel array processors.
  35. Kondou Harufusa (Hyogo JPX) Kuranaga Hiroshi (Hyogo JPX), Programmable logic array having a changeable logic structure.
  36. Furtek Frederick C. (Arlington MA), Programmable logic cell and array.
  37. Turner John E. (Beaverton OR) Rutledge David L. (Beaverton OR) Darling Roy D. (Forest Grove OR), Programmable logic device configurable input/output cell.
  38. Khong James C. K. (San Jose CA) Mueller Wendey E. (Fremont CA) Yu Joe (Palo Alto CA) Berger Neal (Cupertino CA) Gudger Keith H. (Soquel CA) Gongwer Geoffrey S. (Campbell CA), Programmable logic device with regional and universal signal routing.
  39. Kohler Helmut (Mnsheim DEX) Schumacher Norbert (Neuhausen DEX), Programmable neural logic device.
  40. Hinton Harvard S. (Naperville IL) Lentine Anthony L. (St. Charles IL) Miller David A. B. (Fair Haven NJ), Programmable optical logic device with complementary inputs.
  41. Fujimaki Norio (Atsugi JPX), Superconducting quantum interference magnetometer having a plurality of gated channels.
  42. Baxter Michael A., System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware.
  43. Ting Tah-Kang J. (Emmaus PA), TTL and CMOS logic compatible GAAS logic family.
  44. Burrows, James L., Universal logic circuit.
  45. Furtek Frederick C. (Menlo Park CA) Camarota Rafael C. (San Jose CA), Versatile programmable logic cell for use in configurable logic arrays.

이 특허를 인용한 특허 (48)

  1. Tzoufras, Michail; Gajek, Marcin Jan; Bozdag, Kadriye Deniz; El Baraji, Mourad, AC current write-assist in orthogonal STT-MRAM.
  2. Kent, Andrew; Bedau, Daniel; Liu, Huanlong, Bipolar spin-transfer switching.
  3. Kent, Andrew; Bedau, Daniel; Liu, Huanlong, Bipolar spin-transfer switching.
  4. Kent, Andrew; Bedau, Daniel; Liu, Huanlong, Current induced spin-momentum transfer stack with dual insulating layers.
  5. Kent, Andrew; Bedau, Daniel; Liu, Huanlong, Current induced spin-momentum transfer stack with dual insulating layers.
  6. Daughton, James M.; Pohm, Arthur V.; Tondra, Mark C., Current switched magnetoresistive memory cell.
  7. Daughton, James M.; Pohm, Arthur V.; Tondra, Mark C., Current switched magnetoresistive memory cell.
  8. Johnson,Mark B., Digital processing device with disparate magnetoelectronic gates.
  9. Dejenfelt, Anders T.; Liu, David Kuan-Yu, EEPROM memory cell array architecture for substantially eliminating leakage current.
  10. Kent,Andrew; Stein,Daniel, High speed low power annular magnetic devices based on current induced spin-momentum transfer.
  11. Kent, Andrew; Ozyilmaz, Barbaros; Gonzalez Garcia, Enrique, High speed low power magnetic devices based on current induced spin-momentum transfer.
  12. Kent, Andrew; Stein, Daniel L.; Beaujour, Jean-Marc, High speed low power magnetic devices based on current induced spin-momentum transfer.
  13. Kent, Andrew; Stein, Daniel; Beaujour, Jean-Marc, High speed low power magnetic devices based on current induced spin-momentum transfer.
  14. Johnson, Mark B, Hybrid hall effect magnetoelectronic gate.
  15. Kent, Andrew; Backes, Dirk, Increased magnetoresistance in an inverted orthogonal spin transfer layer stack.
  16. Kent, Andrew; Backes, Dirk, Inverted orthogonal spin transfer layer stack.
  17. Schabes, Manfred Ernst; Kardasz, Bartlomiej Adam; Pinarbasi, Mustafa, MRAM with reduced stray magnetic fields.
  18. Koch, Reinhold; Pampuch, Carsten; Ney, Andreas; Ploog, Klaus H., Magnetic logic device.
  19. Koike, Fumihito; Okumura, Hirofumi; Shinohara, Eiji; Shigeta, Kazuhiro; Saito, Taku, Magnetic sensor, method of manufacturing magnetic sensor, and method of designing magnetic sensor.
  20. Agan,Tom Allen; Lai,James Chyi, Magnetic transistor with the AND/NAND/NOR/OR functions.
  21. Johnson, Mark B., Magnetic tunnel junction based logic circuits.
  22. Johnson, Mark B., Magnetic tunnel junction based reconfigurable processing system and components.
  23. Pinarbasi, Mustafa; Kardasz, Bartek, Magnetic tunnel junction structure for MRAM device.
  24. Ravelosona,Dafine; Terris,Bruce David, Memory cell and programmable logic having ferromagnetic structures exhibiting the extraordinary hall effect.
  25. Pinarbasi, Mustafa; Kardasz, Bartek, Memory cell having magnetic tunnel junction and thermal stability enhancement layer.
  26. Berger, Neal; Louie, Ben; El-Baraji, Mourad, Method and apparatus for bipolar memory write-verify.
  27. Pinarbasi, Mustafa, Method for manufacturing MTJ memory device.
  28. Pinarbasi, Mustafa, Method for manufacturing MTJ memory device.
  29. El Baraji, Mourad; Bozdag, Kadriye Deniz; Gajek, Marcin Jan; Tzoufras, Michail, Microwave write-assist in orthogonal STT-MRAM.
  30. El Baraji, Mourad; Bozdag, Kadriye Deniz; Gajek, Marcin Jan; Tzoufras, Michail, Microwave write-assist in series-interconnected orthogonal STT-MRAM devices.
  31. Johnson, Mark B., Nonvolatile logic circuit architecture and method of operation.
  32. Schabes, Manfred Ernst; Pinarbasi, Mustafa Michael; Kardasz, Bartlomiej Adam, Perpendicular magnetic tunnel junction device with offset precessional spin current layer.
  33. Pinarbasi, Mustafa Michael; Hernandez, Jacob Anthony; Datta, Arindom; Gajek, Marcin Jan; Zantye, Parshuram Balkrishna, Polishing stop layer(s) for processing arrays of semiconductor elements.
  34. Pinarbasi, Mustafa Michael; Tzoufras, Michail, Precessional spin current structure for MRAM.
  35. Pinarbasi, Mustafa Michael; Tzoufras, Michail; Kardasz, Bartlomiej Adam, Precessional spin current structure for MRAM.
  36. Beil, Ralph G.; Ketner, Kenneth Laine, Quantum switches and circuits.
  37. Bangert, Joachim, Reconfigurable digital logic unit.
  38. Johnson, Mark B, Reconfigurable magnetoelectronic processing circuits.
  39. Johnson, Mark B., Reconfigurable magnetoelectronic processing system.
  40. Kent, Andrew, Scalable orthogonal spin transfer magnetic random access memory devices with reduced write error rates.
  41. Kent, Andrew, Scalable orthogonal spin transfer magnetic random access memory devices with reduced write error rates.
  42. Sugawara,Minoru; Motoyoshi,Makoto, Semiconductor-integrated circuit utilizing magnetoresistive effect elements.
  43. Sugawara,Minoru; Motoyoshi,Makoto, Semiconductor-integrated circuit utilizing magnetoresistive effect elements.
  44. Ryan, Eric Michael; Gajek, Marcin Jan; Bozdag, Kadriye Deniz; Tzoufras, Michail, Shared oscillator (STNO) for MRAM array write-assist in orthogonal STT-MRAM.
  45. Kardasz, Bartlomiej Adam; Pinarbasi, Mustafa Michael, Spin transfer torque structure for MRAM devices having a spin current injection capping layer.
  46. Kardasz, Bartlomiej Adam; Pinarbasi, Mustafa Michael, Spin transfer torque structure for MRAM devices having a spin current injection capping layer.
  47. Schabes, Manfred Ernst; Pinarbasi, Mustafa Michael; Kardasz, Bartlomiej Adam, Switching and stability control for perpendicular magnetic tunnel junction device.
  48. Bozdag, Kadriye Deniz; Gajek, Marcin Jan; Tzoufras, Michail; Ryan, Eric Michael, Three-terminal MRAM with ac write-assist for low read disturb.
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