초록 ▼

A bandgap voltage reference circuit for 0.35-.mu.m, 3-volt CMOS technology operates in an essentially temperature independent manner and having low supply voltages. The bandgap voltage reference circuit incorporates two operational amplifiers. One operational amplifier biases bipolar devices of the

A bandgap voltage reference circuit for 0.35-.mu.m, 3-volt CMOS technology operates in an essentially temperature independent manner and having low supply voltages. The bandgap voltage reference circuit incorporates two operational amplifiers. One operational amplifier biases bipolar devices of the circuit and generates a PTAT voltage across a resistor, and the other operational amplifier buffers a voltage related to the PTAT voltage and a voltage across one bipolar device to generate the bandgap voltage reference. In one embodiment, the circuit includes a start-up circuit to ensure a stable and desired start-up state. A current bias may also be provided. The bandgap voltage reference of the second operational amplifier may also provide a regulated supply for the first stage of the circuit. The second operational amplifier also provides a buffered output to a resistor divider circuit to supply a voltage divider to generate voltages below the 1.24-volt bandgap voltage. The bandgap voltage reference circuit includes two versions, one which is optimized for a low supply voltage potential V.sub.DD of approximately 1.8 volts and the other for a standard supply voltage V.sub.DD of approximately 2.4 volts.

대표청구항 ▼

[ What is claimed is:] [1.] An integrated circuit having a bandgap voltage reference circuit (e.g., 100 in FIG. 1) comprising:a proportional to absolute temperature (PTAT) voltage generator (e.g., 190) adapted to generate:in a first current path, a first PTAT voltage across a first impedance (e.g.,

[ What is claimed is:] [1.] An integrated circuit having a bandgap voltage reference circuit (e.g., 100 in FIG. 1) comprising:a proportional to absolute temperature (PTAT) voltage generator (e.g., 190) adapted to generate:in a first current path, a first PTAT voltage across a first impedance (e.g., 110) and a second PTAT voltage across a first device (e.g., 106); andin a second current path, a third PTAT voltage across a second device (e.g., 108), wherein:each of the first and second devices generating the second and third PTAT voltages operates in accordance with a diode junction equation for the corresponding device;the first device is coupled in series with the first impedance in the first current path; andthe PTAT voltage generator includes a feedback amplifier coupled to receive the sum of the first and second PTAT voltages at its first input terminal and the third PTAT voltage at its second input terminal, a feedback voltage signal at the output terminal of the feedback amplifier employed to regulate the current in the first and second current paths such that a sum of the first and second PTAT voltages is substantially equivalent to the third PTAT voltage; anda voltage buffer (e.g., 192) 1) receiving, at its first input terminal, a voltage across a second impedance (e.g., 124) coupled in a feedback path between an output terminal of the voltage buffer and the one input terminal, and 2) receiving, at its second terminal the third PTAT voltage to generate a bandgap voltage at the output terminal of the voltage buffer (e.g., N4), wherein:the voltage across and current through the second impedance are substantially proportional to the first PTAT voltage across and current through the first impedance, respectively; andcurrent through the feedback path of the voltage buffer regulates the voltage across the second impedance in accordance with the third PTAT voltage so as to regulate the bandgap voltage.