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Process for forming a copper-containing film 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
출원번호 US-0227013 (1999-01-07)
발명자 / 주소
  • Uzoh Cyprian E.
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    Ratner & PrestiaTownsend, Esq.
인용정보 피인용 횟수 : 35  인용 특허 : 11

초록

A structure and process for a copper-containing, wire-bonding pad structure for bonding to gold wires. The structure includes a nickel-containing film to improve metal lurgical characteristics. The structure also has a laminated impurity film within the copper pad, which complexes with the nickel-co

대표청구항

[ What is claimed:] [1.] A process for forming a copper-containing structure, comprising the steps of:a) forming a first bulk copper-containing film at least indirectly on a substrate, said first bulk copper-containing film having a first surface;b) roughening said first surface;c) laminating an imp

이 특허에 인용된 특허 (11)

  1. Andricacos Panayotis C. (Croton-on-Hudson NY) Chang I-Chia (Peekskill NY) Deligianni Hariklia (Edgewater NJ) Horkans Wilma J. (Ossining NY), Acid electrolyte solution and process for the electrodeposition of copper-rich alloys exploiting the phenomenon of under.
  2. Mizuhara Howard (Hillsborough CA), Ductile reactive metal-indium-copper brazing alloy article.
  3. Feldman Leonard C. (Berkeley Heights NJ) Higashi Gregg S. (Basking Ridge NJ) Mak Cecilia Y. (Bedminster NJ) Miller Barry (Murray Hill NJ), Fabrication of electronic devices by electroless plating of copper onto a metal silicide.
  4. Volfson David (Worcester MA) Senturia Stephen D. (Boston MA), High-density, multi-level interconnects, flex circuits, and tape for tab.
  5. Chakravorty Kishore K. (Issaquah WA) Tanielian Minas H. (Bellevue WA), Method of fabricating high-density interconnect structures having tantalum/tantalum oxide layers.
  6. Pan Ju-Don T. (Austin TX), Method of making an electrical multilayer interconnect.
  7. Helton Raymond L. (Beaverton OR) Trobough Douglas W. (Beaverton OR) McPherson Marianne (Portland OR), Plating bath composition for copper-tin-zinc alloy.
  8. Kondo Ichiharu (Nagoya JPX) Noritake Chikage (Ama-gun JPX) Watanabe Yusuke (Obu JPX), Semiconductor device with bump structure.
  9. Mahulikar Deepak (Madison CT) Mravic Brian (North Haven CT), Surface modified copper alloys.
  10. Mahulikar, Deepak; Mravic, Brian, Surface modified copper alloys.
  11. Efland Taylor R. ; Mai Quang X. ; Williams Charles E. ; Keller Stephen A., Thick plated interconnect and associated auxillary interconnect.

이 특허를 인용한 특허 (35)

  1. McCormick, John P., Bonding pad interface.
  2. Akram, Salman, Copper interconnect.
  3. Akram,Salman, Copper interconnect.
  4. Akram,Salman, Copper interconnect.
  5. Akram,Salman, Copper interconnect for semiconductor device.
  6. Shen, Meihua; Wang, Xikun; Liu, Wei; Du, Yan; Deshmukh, Shashank, Device and method for etching flash memory gate stacks comprising high-k dielectric.
  7. Uzoh, Cyprian; Oganesian, Vage; Mohammed, Ilyas; Haba, Belgacem; Savalia, Piyush; Mitchell, Craig, Electrical barrier layers.
  8. Uzoh, Cyprian; Oganesian, Vage; Mohammed, Ilyas; Haba, Belgacem; Savalia, Piyush; Mitchell, Craig, Electrical barrier layers.
  9. Mani, Radhika; Gani, Nicolas; Liu, Wei; Shen, Meihua; Deshmukh, Shashank C., Etching high K dielectrics with high selectivity to oxide containing layers at elevated temperatures with BC13 based etch chemistries.
  10. Barth, Hans-Joachim; Felsner, Petra; Kaltalioglu, Erdem; Friese, Gerald, FBEOL process for Cu metallizations free from Al-wirebond pads.
  11. Shen, Wen-Wei; Chen, Chen-Shien; Kuo, Chen-Cheng; Chen, Ming-Fa; Wang, Rung-De, Improving the strength of micro-bump joints.
  12. Gambino, Jeffrey P.; Gill, Jason P.; Smith, Sean; Wynne, Jean E., Low leakage metal-containing cap process using oxidation.
  13. Gambino, Jeffrey P.; Gill, Jason P.; Smith, Sean; Wynne, Jean E., Low leakage metal-containing cap process using oxidation.
  14. Addi B. Mistry ; Rina Chowdhury ; Scott K. Pozder ; Deborah A. Hagen ; Rebecca G. Cole ; Kartik Ananthanarayanan ; George F. Carney, Method and apparatus for manufacturing an interconnect structure.
  15. Akram, Salman, Method and semiconductor device having copper interconnect for bonding.
  16. DeHaven Patrick William ; Locke Peter S. ; Rodbell Kenneth P ; Uzoh Cyprian Emeka, Method for controlling the texture and microstructure of plated copper and plated structure.
  17. Sambucetti, Carlos Juan; Rubino, Judith Marie; Edelstein, Daniel Charles; Cabral, Jr., Cyryl; Walker, George Frederick; Gaudiello, John G; Wildman, Horatio Seymour, Method for forming Co-W-P-Au films.
  18. Burrell,Lloyd G.; Davis,Charles R.; Goldblatt,Ronald D.; Landers,William F.; Mehta,Sanjay C., Method of fabricating a wire bond pad with Ni/Au metallization.
  19. Chinda, Akira; Matsuura, Akira, Method of fabricating a wiring board utilizing a conductive member having a reduced thickness.
  20. Akram, Salman, Method of improving copper interconnects of semiconductor devices for bonding.
  21. Akram, Salman, Method of improving copper interconnects of semiconductor devices for bonding.
  22. Akram,Salman, Method of improving copper interconnects of semiconductor devices for bonding.
  23. Tokushige, Ryoji; Takai, Nobuyuki; Shinogi, Hiroyuki; Ono, Seiichi, Method of manufacturing a semiconductor device.
  24. Emesh, Ismail T.; Shaviv, Roey; Naik, Mehul, Methods for producing interconnects in semiconductor devices.
  25. Emesh, Ismail T.; Shaviv, Roey; Naik, Mehul, Methods for producing interconnects in semiconductor devices.
  26. Ning, Xian J., Plate-through hard mask for MRAM devices.
  27. Akram, Salman, Semiconductor device having copper interconnect for bonding.
  28. Lindgren, Joseph T., Semiconductor device with copper wirebond sites and methods of making same.
  29. Lindgren, Joseph T., Semiconductor device with copper wirebond sites and methods of making same.
  30. Morozumi, Yukio, Semiconductor devices and methods for manufacturing the same.
  31. Sakaguchi, Hideaki, Solder ball mounting method and solder ball mounting substrate manufacturing method.
  32. Shen, Wen-Wei; Chen, Chen-Shien; Kuo, Chen-Cheng; Chen, Ming-Fa; Wang, Rung-De, Strength of micro-bump joints.
  33. Yu, Jui-I, Under bump metallurgy structure and wafer structure using the same and method of manufacturing wafer structure.
  34. Seshan, Krishna; Singh, Kuljeet, Wire-bond process flow for copper metal-six, structures achieved thereby, and testing method.
  35. Chinda, Akira; Matsuura, Akira, Wiring board utilizing a conductive member having a reduced thickness.
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