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[미국특허] Efficient CRC generation utilizing parallel table lookup operations 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03M-013/00
  • G06F-011/10
출원번호 US-0021516 (1998-02-10)
발명자 / 주소
  • Dubey Pradeep Kumar
  • Kaplan Marc Adam
  • Joshi Sanjay Mukund
출원인 / 주소
  • International Business Machines Corporation
인용정보 피인용 횟수 : 100  인용 특허 : 5

초록 ▼

An improved CRC generation mechanism for generating a CRC value of relevant data in a digital data stream is disclosed wherein relevant data in the data stream is identified and partitioned into a plurality of intervals. A CRC value is determined for each interval by partitioning the interval into a

대표청구항 ▼

[ We claim:] [1.]1. A method for generating a CRC value representing data in a digital data stream, the method comprising the steps of:identifying relevant data in said digital data stream;identifying a plurality of successive intervals in the relevant data, wherein said plurality of successive inte

이 특허에 인용된 특허 (5) 인용/피인용 타임라인 분석

  1. Li Shiping (Canton MA) Pasco-Anderson James A. (Needham MA), Efficient CRC remainder coefficient generation and checking device and method.
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  2. DesJardins Philip A. ; Mantri Ravi G., High speed calculation of cyclical redundancy check sums.
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  3. Jedwab Jonathan,GB2, Method and apparatus for verifying CRC codes.
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  4. Yamamoto Haruhisa,JPX ; Idemura Takeshi,JPX, Optical apparatus with power transmission mechanism.
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  5. Dujari Vineet (Santa Clara CA) Copp Larry A. (Boise ID), Single chip error processor.
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이 특허를 인용한 특허 (100) 인용/피인용 타임라인 분석

  1. Stein,Yosef; Kablotsky,Joshua A., Advanced encryption standard (AES) engine with real time S-box generation.
    상세보기
  2. Ford, Simon; Seal, David James, Aliasing data processing registers.
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  3. Raubuch, Martin, Arrangement, system and method for vector permutation in single-instruction multiple-data mircoprocessors.
    상세보기
  4. Richard, Elizabeth Anne, CRC syndrome generation for multiple data input widths.
    상세보기
  5. Stein,Yosef; Kablotsky,Joshua A., Center focused single instruction multiple data (SIMD) array system.
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  6. Stein,Yosef; Kablotsky,Joshua A., Compact Galois field multiplier engine.
    상세보기
  7. Wilson, James; Kablotsky, Joshua A.; Stein, Yosef; Prendergast, Colm J.; Yukna, Gregory M.; Mayer, Christopher M., Compute units using local luts to reduce pipeline stalls.
    상세보기
  8. Wilson,James; Stein,Yosef; Kablotsky,Joshua, Condensed Galois field computing system.
    상세보기
  9. Chen, Zhengang; Burd, Gregory; Chaichanavong, Panu, Cyclic redundancy check for out-of-order codewords.
    상세보기
  10. Oren,Amit, Data integrity in protocol offloading.
    상세보기
  11. Rose,Andrew Christopher; Ford,Simon Andrew; Symes,Dominic Hugo; Seal,David James, Data processing apparatus and method for moving data between registers and memory in response to an access instruction having an alignment specifier identifying an alignment to be associated with a s.
    상세보기
  12. Ford,Simon Andrew; Symes,Dominic Hugo; Rose,Andrew Christopher; Lutz,David Raymond; Hinds,Christopher Neal, Data processing apparatus and method for moving data elements between a chosen lane of parallel processing in registers and a structure within memory.
    상세보기
  13. Ford,Simon Andrew; Symes,Dominic Hugo; Rose,Andrew Christopher; Lutz,David Raymond; Hinds,Christopher Neal, Data processing apparatus and method for moving data elements between specified registers and a continuous block of memory.
    상세보기
  14. Symes, Dominic Hugo; Ford, Simon Andrew, Data processing apparatus and method for performing N-way interleaving and de-interleaving operations where N is an odd plural number.
    상세보기
  15. Symes, Dominic Hugo; Ford, Simon Andrew, Data processing apparatus and method for performing arithmetic operations in SIMD data processing.
    상세보기
  16. Ford, Simon Andrew; Seal, David James; Dijkstra, Wilco, Data processing apparatus and method for performing data processing operations on floating point data elements.
    상세보기
  17. Ford,Simon Andrew; Symes,Dominic Hugo, Data processing apparatus and method for performing in parallel a data processing operation on data elements.
    상세보기
  18. Boettcher, Matthias Lothar; Eyole-Monono, Mbou; Gabrielli, Giacomo, Data processing apparatus and method for performing scan operations.
    상세보기
  19. Lutz, David Raymond; Burgess, Neil, Data processing apparatus having SIMD processing circuitry.
    상세보기
  20. Conway, Bruce; Halperin, Louis E., Data recovery utilizing optimized code table signaling.
    상세보기
  21. Gopal, Vinodh; Kounavis, Michael; Wolrich, Gilbert, Determining a message residue.
    상세보기
  22. Gopal, Vinodh; Wolrich, Gilbert; Feghali, Wajdi; Ozturk, Erdinc; Gueron, Shay, Determining a message residue.
    상세보기
  23. Gueron, Shay; Gopal, Vinodh; Feghali, Wajdi K.; Wolrich, Gilbert M., Determining a message residue.
    상세보기
  24. Barash, Dror, Determining data transmission error and/or checking or confirming such error determinations.
    상세보기
  25. Hasenplaugh, William C.; Burres, Brad A.; Gaubatz, Gunnar, Determining message residue using a set of polynomials.
    상세보기
  26. Conway, Bruce, Dynamic control of quality of service (QOS) using derived QOS measures.
    상세보기
  27. Radhakrishnan, Sivakumar; Schmisseur, Mark A.; Tan, Sin S.; Haren, Kenneth C.; Brown, Thomas C.; Kumar, Pankaj; Gopal, Vinodh; Feghali, Wajdi K., Efficient and scalable cyclic redundancy check circuit using Galois-field arithmetic.
    상세보기
  28. Flachs, Brian; Minor, Barry L.; Nutter, Mark Richard, Efficient multi-level software cache using SIMD vector permute functionality.
    상세보기
  29. Conway, Bruce, Enhanced signal integrity and communication utilizing optimized code table signaling.
    상세보기
  30. Conway, Bruce, Enhanced signal integrity and communication utilizing optimized code table signaling.
    상세보기
  31. Roy,Pulakesh; Boros,Tibor; Bhora,Veerendra, Error detection for multi-stream communications.
    상세보기
  32. Stein, Yosef; Primo, Haim; Kablotsky, Joshua A., Galois field multiplier system.
    상세보기
  33. Stein,Yosi; Primo,Haim; Sapir,Yaniv, Galois field multiply/multiply-add/multiply accumulate.
    상세보기
  34. Gray, Scott L., High speed memory error detection and correction using interleaved (8,4) LBCs.
    상세보기
  35. Grinchuk, Mikhail I.; Bolotov, Anatoli A.; Ivanovic, Lav, High throughput frame check sequence module architecture.
    상세보기
  36. Paaske, Timothy R., Instruction sequence verification to protect secured data.
    상세보기
  37. Paaske,Timothy R., Instruction sequence verification to protect secured data.
    상세보기
  38. Cooper, John F., Interleaved parallel redundancy check calculation for memory devices.
    상세보기
  39. Sazegari,Ali, Large table vectorized lookup by selecting entries of vectors resulting from permute operations on sub-tables.
    상세보기
  40. Wilson, James; Kablotsky, Joshua A.; Stein, Yosef; Mayer, Christopher M., Lookup table addressing system and method.
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  41. Bain,Peter, Method and apparatus for calculating cyclic redundancy checks for variable length packets.
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  42. Dijkstra, Wilco; Ford, Simon Andrew; Seal, David James, Method and apparatus for constant generation in SIMD processing.
    상세보기
  43. Wang, Xiao-an; Berkmann, Jens, Method and apparatus for performing a CRC check.
    상세보기
  44. Wang, Xiao-an; Berkmann, Jens, Method and apparatus for performing a CRC check.
    상세보기
  45. Gopal, Vinodh; Guilford, James D.; Ozturk, Erdinc; Feghali, Wajdi K.; Wolrich, Gilbert M.; Dixon, Martin G., Method and apparatus for performing a shift and exclusive or operation in a single instruction.
    상세보기
  46. Gopal, Vinodh; Guilford, James D.; Ozturk, Erdinc; Feghali, Wajdi K.; Wolrich, Gilbert M.; Dixon, Martin G., Method and apparatus for performing a shift and exclusive or operation in a single instruction.
    상세보기
  47. Gopal, Vinodh; Guilford, James D.; Ozturk, Erdinc; Feghali, Wajdi K.; Wolrich, Gilbert M.; Dixon, Martin G., Method and apparatus for performing a shift and exclusive or operation in a single instruction.
    상세보기
  48. Gopal, Vinodh; Guilford, James D.; Ozturk, Erdine; Feghali, Wajdi K.; Wolrich, Gilbert M.; Dixon, Martin G., Method and apparatus for performing a shift and exclusive or operation in a single instruction.
    상세보기
  49. Oren, Amit, Method and system for error detection for improving data integrity in protocol offloading.
    상세보기
  50. Maitland,Roger; Turnbull,Mark, Method and system for parallel CRC calculation.
    상세보기
  51. Maitland,Roger; Turnbull,Mark, Method and system for parallel state machine implementation.
    상세보기
  52. Trivedi, Sushma Shrikant; Benkual, Jack; Bratt, Joseph P.; Athas, William C., Method for variable length decoding using multiple configurable look-up tables.
    상세보기
  53. Moyer, William C., Methods for performing extended table lookups using SIMD vector permutation instructions that support out-of-range index values.
    상세보기
  54. Barash, Dror, Methods, architectures, circuits and systems for transmission error determination.
    상세보기
  55. Barash,Dror, Methods, architectures, circuits and systems for transmission error determination.
    상세보기
  56. Barash,Dror, Methods, architectures, circuits, software and systems for CRC determination.
    상세보기
  57. Barash,Dror, Methods, circuits, architectures, software and systems for determining a data transmission error and/or checking or confirming such error determinations.
    상세보기
  58. Hasenplaugh, William C.; Gaubatz, Gunnar; Gopal, Vinodh, Modular reduction using folding.
    상세보기
  59. Garnett, Paul J.; Rowlinson, Stephen; Oyelakin, Femi A., Multi-processor system bridge with controlled access.
    상세보기
  60. Lin,Ming i M.; Connolly,Brian J.; Leonard,Todd E.; Mann,Gregory J.; Raymond,Jonathan H., Multilevel parallel CRC generation and checking circuit.
    상세보기
  61. Conway, Bruce, Optimized code table signaling for authentication to a network and information system.
    상세보기
  62. Conway, Bruce, Optimized code table signaling for authentication to a network and information system.
    상세보기
  63. Conway, Bruce, Optimized code table signaling for authentication to a network and information system.
    상세보기
  64. Conway, Bruce, Optimized code table signaling for authentication to a network and information system.
    상세보기
  65. Conway, Bruce, Optimized code table signaling for authentication to a network and information system.
    상세보기
  66. Conway, Bruce, Optimized data transfer utilizing optimized code table signaling.
    상세보기
  67. Oren,Amit, Out-of-order calculation of error detection codes.
    상세보기
  68. Dubey, Pradeep Kumar; Joshi, Sanjay Mukund; Kaplan, Marc Adam, Parallel system and method for cyclic redundancy checking (CRC) generation.
    상세보기
  69. Wilson, James; Kablotsky, Joshua A.; Stein, Yosef; Prendergast, Colm J.; Yukna, Gregory M.; Mayer, Christopher M., Pipelined digital signal processor.
    상세보기
  70. Wilson, James; Stein, Yosef; Yukna, Gregory; Lahr, Lewis, Programmable compute unit with internal register and bit FIFO for executing Viterbi code.
    상세보기
  71. Stein,Yosef; Primo,Haim, Programmable data encryption engine.
    상세보기
  72. Stein,Yosef; Primo,Haim, Programmable data encryption engine for advanced encryption standard algorithm.
    상세보기
  73. Stein,Yosef; Primo,Haim; Sapir,Yaniv, Reconfigurable input Galois field linear transformer system.
    상세보기
  74. Stein, Yosef; Primo, Haim, Reconfigurable parallel look up table system.
    상세보기
  75. Stein, Yosef; Kablotsky, Joshua A., Reconfigurable single instruction multiple data array.
    상세보기
  76. Carpenter,Paul Matthew; Ford,Simon Andrew, Shift and insert instruction for overwriting a subset of data within a register with a shifted result of another register.
    상세보기
  77. Moyer, William C.; Ahmed, Imran; Tamir, Dan E., Single-instruction multiple-data vector permutation instruction and method for performing table lookups for in-range index values and determining constant values for out-of-range index values.
    상세보기
  78. Sait, Sadiq Mohammed; Siddiqi, Umair Farooq, System and method for inverse halftoning.
    상세보기
  79. Maitland, Roger; Combes, Eric, System and method for processing multiple types of data frames.
    상세보기
  80. Hepner, David F.; Walls, Andrew D., System and method of error detection for unordered data delivery.
    상세보기
  81. Symes, Dominic Hugo; Ford, Simon; Rose, Andrew Christopher, Table lookup operation within a data processing system.
    상세보기
  82. Stein, Yosef; Malepati, Hazarathaiah, Variable length decoder system and method.
    상세보기
  83. Bradbury, Jonathan D., Vector Galois Field Multiply Sum and Accumulate instruction.
    상세보기
  84. Bradbury, Jonathan D., Vector Galois field multiply sum and accumulate instruction.
    상세보기
  85. Bradbury, Jonathan D.; Schwarz, Eric M., Vector checksum instruction.
    상세보기
  86. Bradbury, Jonathan D.; Schwarz, Eric M., Vector checksum instruction.
    상세보기
  87. Bradbury, Jonathan D.; Schwarz, Eric M., Vector checksum instruction.
    상세보기
  88. Bradbury, Jonathan D.; Schwarz, Eric M., Vector checksum instruction.
    상세보기
  89. Bradbury, Jonathan D.; Schwarz, Eric M., Vector checksum instruction.
    상세보기
  90. Bradbury, Jonathan D.; Enenkel, Robert F.; Schwarz, Eric M.; Slegel, Timothy J., Vector element rotate and insert under mask instruction.
    상세보기
  91. Bradbury, Jonathan D.; Enenkel, Robert F.; Schwarz, Eric M.; Slegel, Timothy J., Vector element rotate and insert under mask instruction.
    상세보기
  92. Bradbury, Jonathan D.; Gschwind, Michael K.; Schwarz, Eric M.; Slegel, Timothy J., Vector exception code.
    상세보기
  93. Bradbury, Jonathan D.; Gschwind, Michael K.; Schwarz, Eric M.; Slegel, Timothy J., Vector exception code.
    상세보기
  94. Bradbury, Jonathan D.; Schwarz, Eric M., Vector floating point test data class immediate instruction.
    상세보기
  95. Bradbury, Jonathan D.; Schwarz, Eric M., Vector floating point test data class immediate instruction.
    상세보기
  96. Bradbury, Jonathan D.; Schwarz, Eric M., Vector floating point test data class immediate instruction.
    상세보기
  97. Bradbury, Jonathan D., Vector galois field multiply sum and accumulate instruction.
    상세보기
  98. Bradbury, Jonathan D.; Enenkel, Robert F.; Schwarz, Eric M.; Slegel, Timothy J., Vector generate mask instruction.
    상세보기
  99. Bradbury, Jonathan D.; Enenkel, Robert F.; Schwarz, Eric M.; Slegel, Timothy J., Vector generate mask instruction.
    상세보기
  100. Ali Sazegari, Vectorized table lookup.
    상세보기

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