이 특허에 인용된 특허 (18) 인용/피인용 타임라인 분석

1. Panwar Ramesh ; Hetherington Ricky C., Apparatus for executing coded dependent instructions having variable latencies.

   상세보기
2. Ross Jonathan K. ; Mills Jack D. ; Hays James O. ; Burger Stephen G. ; Morris Dale C. ; Thompson Carol L. ; Gupta Rajiv ; Freudenberger Stefan M. ; Hammond Gary N. ; Kling Ralph M., Computer architecture for the deferral of exceptions on speculative instructions.

   상세보기
3. Dubey Pradeep Kumar ; Barton Charles Marshall ; Chuang Chiao-Mei ; Lam Linh Hue ; O'Brien John Kevin ; O'Brien Kathryn Mary, Executing speculative parallel instructions threads with forking and inter-thread communication.

   상세보기
4. Schlansker Michael S. ; Kathail Vinod, Flexible scheduling of non-speculative instructions.

   상세보기
5. Ebcioglu Kemal ; Silberman Gabriel Mauricio, Handling of exceptions in speculative instructions.

   상세보기
6. Dubey Pradeep Kumar, Method and apparatus for biasing cache LRU for prefetched instructions/data based upon evaluation of speculative condit.

   상세보기
7. Faraboschi Paolo ; Such-Vicente Alberto,ESX, Method and apparatus for protecting memory-mapped devices from side effects of speculative instructions.

   상세보기
8. Henstrom Alexander P. ; Martell Robert W., Method and apparatus for recovering the state of a speculatively scheduled operation in a processor which cannot be ex.

   상세보기
9. Kathail Vinod K. (Cupertino CA) Gupta Rajiv (Los Altos CA) Rau Bantwal R. (Los Altos CA) Schlansker Michael S. (Los Altos CA) Worley ; Jr. William S. (Breckenridge CO) Amerson Frederic C. (Santa Clar, Method and system for deferring exceptions generated during speculative execution.

   상세보기
10. Gupta Rajiv ; Karp Alan H., Method and system for selecting instructions for re-execution for in-line exception recovery in a speculative execution.

    상세보기
11. Loper Albert J. (Cedar Park TX) Mallick Soummya (Austin TX) Putrino Michael (Austin TX), Method for executing speculative load instructions in high-performance processors.

    상세보기
12. Moudgill Mayan, Multiple issue static speculative instruction scheduling with path tag and precise interrupt handling.

    상세보기
13. Dangelo Carlos, Object-oriented multi-media architecture.

    상세보기
14. Schlansker Michael S. ; Kathail Vinod, Reducing the number of executed branch instructions in a code sequence.

    상세보기
15. Adler Michael C. (Lexington MA) Hobbs Steven O. (Westford MA) Lowney Paul G. (Concord MA), Software mechanism for accurately handling exceptions generated by speculatively scheduled instructions.

    상세보기
16. Cohn Robert ; Adler Michael C. ; Lowney Paul Geoffrey, Software mechanism for reducing exceptions generated by speculatively scheduled instructions.

    상세보기
17. Tran Thang ; Witt David B. ; Johnson William M., Superscalar microprocessor including a high speed instruction alignment unit.

    상세보기
18. Mendelson Avi,ILX ; Gabbay Freddy,ILX, System and method for concurrent processing.

    상세보기
더보기

이 특허를 인용한 특허 (76) 인용/피인용 타임라인 분석

1. Derrick R. Meyer ; Stephan G. Meier ; Norbert Juffa, Apparatus and method for superforwarding load operands in a microprocessor.

   상세보기
2. Ishizaki, Kazuaki, Automatically enabling a read-only cache in a language in which two arrays in two different variables may alias each other.

   상세보기
3. Zhang, Wenjie; Tang, Xinan, Checking for memory access collisions in a multi-processor architecture.

   상세보기
4. Cui, Shimin; Silvera, Raul Esteban, Code motion based on live ranges in an optimizing compiler.

   상세보기
5. Shtilman, Dmitri; Panchenko, Maksim V.; Wang, Fu-Hwa, Code transformation to optimize fragments that implement constant loading.

   상세보기
6. Koseki,Akira; Komatsu,Hideaki, Compiler and register allocation method.

   상세보기
7. Kawahito, Motohiro; Komatsu, Hideaki, Compiler device, method, program and recording medium.

   상세보기
8. Kawahito,Motohiro; Komatsu,Hideaki, Compiler device, method, program and recording medium.

   상세보기
9. Ramani, Srinivasan; Taneja, Rohit, Compiler that performs register promotion optimizations in regions of code where memory aliasing may occur.

   상세보기
10. Clarke,Stephen, Compiling computer programs including branch instructions.

    상세보기
11. Ishizaki,Kauaki; Inagaki,Tatshushi; Komatsu,Hideaki, Compiling method, apparatus, and program.

    상세보기
12. Lim,Chu Cheow; Du,Zhao Hui; Ngai,Tin Fook, Computation of all-pairs reaching probabilities in software systems.

    상세보기
13. Krueger,Steven E., Computer-implemented exception handling system and method.

    상세보기
14. Krueger,Steven E., Computer-implemented system and method for generating embedded code to add functionality to a user application.

    상세보기
15. Schultz, Ulrik Pagh; Muller, Gilles; Consel, Charles; Clausen, Lars; Goire, Christian, Data compaction method for an intermediate object code program executable in an onboard system provided with data processing resources and corresponding onboard system with multiple applications.

    상세보기
16. McCrady, Donald James; Ringseth, Paul F.; Mehta, Bimal, Data flow analysis of transactional processes.

    상세보기
17. Srinivasan, Uma; Nomura, Kevin; Ju, Dz-ching, Data speculation within modulo scheduled loops.

    상세보기
18. Anthony Cocchi ; Janice Cynthia Shepherd, Determination of local variable type and precision in the presence of subroutines.

    상세보기
19. Denisart, Jean-Luc; Meier, Alain; Bonacci, Enzo; Pleisch, HansPeter; Talon, Christian, Device for preparing a liquid beverage from a cartridge.

    상세보기
20. Sweeney, Timothy Dean, Dual mode evaluation for programs containing recursive computation.

    상세보기
21. Bantz, David F.; Mastrianni, Steven J.; Moulic, James R.; Shea, Dennis G., Dynamic optimization of mobile services.

    상세보기
22. Bantz, David F.; Mastrianni, Steven J.; Moulic, James R.; Shea, Dennis G., Dynamic optimization of mobile services.

    상세보기
23. Murakami, Hirofumi, Electronic equipment and log output method.

    상세보기
24. Rawsthorne,Alasdair; Sandham,John H.; Souloglou,Jason, Exception handling method and apparatus for use in program code conversion.

    상세보기
25. Wang, Cheng; Wu, Youfeng, Expediting execution time memory aliasing checking.

    상세보기
26. Martin, Allan Russell, Extension of swing modulo scheduling to evenly distribute uniform strongly connected components.

    상세보기
27. Robison, Arch D., Fast tree-based generation of a dependence graph.

    상세보기
28. Gschwind, Michael K., Forming instruction groups based on decode time instruction optimization.

    상세보기
29. Gschwind, Michael K., Forming instruction groups based on decode time instruction optimization.

    상세보기
30. Gschwind, Michael K., Forming instruction groups based on decode time instruction optimization.

    상세보기
31. Gschwind, Michael K., Forming instruction groups based on decode time instruction optimization.

    상세보기
32. Sachs,Howard G.; Arya,Siamak, Instruction cache association crossbar switch.

    상세보기
33. Chen, William Y., Instruction reducing predicate copy.

    상세보기
34. Christopher M. McKinsey ; Jayashankar Bharadwaj, Interactive instruction scheduling and block ordering.

    상세보기
35. Grice, Matthew B., Just-ahead-of-time compilation.

    상세보기
36. Metzger,Markus T., Method and apparatus for compiling code.

    상세보기
37. Erik Altman ; Michael K. Gschwind, Method and apparatus for reordering memory operations along multiple execution paths in a processor.

    상세보기
38. Gibson, James Douglas; Bhatia, Rohit, Method and apparatus for resteering failing speculation check instructions.

    상세보기
39. Cheng, Buqi; Ngai, Tin-Fook; Du, Zhaohui; Zhang, PeiNan, Method and system for intermediate representation of source code.

    상세보기
40. Jourdan, Stephan J.; Gabbay, Freddy; Ronen, Ronny; Yoaz, Adi, Method and system for safe data dependency collapsing based on control-flow speculation.

    상세보기
41. Jourdan,Stephan J.; Gabbay,Freddy; Ronen,Ronny; Yoaz,Adi, Method and system for safe data dependency collapsing based on control-flow speculation.

    상세보기
42. Bonaventure,Damien; McInnes,James Lawrence, Method for minimizing spill in code scheduled by a list scheduler.

    상세보기
43. Ju, Dz-ching, Methods and apparatus for preserving precise exceptions in code reordering by using control speculation.

    상세보기
44. Ju,Dz ching, Methods and apparatus for preserving precise exceptions in code reordering by using control speculation.

    상세보기
45. Buskens, Richard Wayne; Gonzalez, Oscar; Ren, Yansong, Methods and devices for recovering from initialization failures.

    상세보기
46. Fu,Chen; Chen,Dong Yuan; Wu,Chengyong; Ju,Dz Ching, Methods and systems for integrated scheduling and resource management for a compiler.

    상세보기
47. Debate, Jeremy; Alexander, Aaron A.; Villamil, Ricardo; Seibel, James P., Modification of compiled applications and application management using retrievable policies.

    상세보기
48. Shidla,Dale John; Barr,Andrew Harvey; Pomaranski,Ken Gary, Opportunistic pattern-based CPU functional testing.

    상세보기
49. Gschwind, Michael K., Optimization of instruction groups across group boundaries.

    상세보기
50. Gschwind, Michael K., Optimization of instruction groups across group boundaries.

    상세보기
51. Adl-Tabatabai, Ali-Reza; de Lima Ottoni, Guilherme; Paleczny, Michael, Optimizing intermediate representation of script code for fast path execution.

    상세보기
52. Adl-Tabatabai, Ali-Reza; de Lima Ottoni, Guilherme; Paleczny, Michael, Optimizing intermediate representation of script code for fast path execution.

    상세보기
53. Ramani, Srinivasan; Taneja, Rohit, Performing register promotion optimizations in a computer program in regions where memory aliasing may occur and executing the computer program on processor hardware that detects memory aliasing.

    상세보기
54. Colavin, Osvaldo; Rizzo, Davide, Predicated execution using operand predicates.

    상세보기
55. Forsyth, Andrew T.; Bradford, Dennis R.; Hall, Jonathan C., Processing memory access instructions that have duplicate memory indices.

    상세보기
56. Ramani, Srinivasan; Taneja, Rohit, Processor that detects memory aliasing in hardware and assures correct operation when memory aliasing occurs.

    상세보기
57. Ramani, Srinivasan; Taneja, Rohit, Processor that detects memory aliasing in hardware and assures correct operation when memory aliasing occurs.

    상세보기
58. Ramani, Srinivasan; Taneja, Rohit, Processor that includes a special store instruction used in regions of a computer program where memory aliasing may occur.

    상세보기
59. Wilkerson, Christopher B.; Srinivasan, Srikanth T.; Ju, Dz-ching, Runtime critical load/data ordering.

    상세보기
60. Bradford, Jeffrey P.; Luick, David A., System and method for a group priority issue schema for a cascaded pipeline.

    상세보기
61. Hank,Richard Eugene, System and method for assigning basic blocks to computer control flow paths.

    상세보기
62. Hank,Richard Eugene, System and method for merging control flow paths.

    상세보기
63. Luick, David A., System and method for optimization within a group priority issue schema for a cascaded pipeline.

    상세보기
64. Luick, David A., System and method for prioritizing arithmetic instructions.

    상세보기
65. Luick, David A., System and method for prioritizing branch instructions.

    상세보기
66. Luick, David A., System and method for prioritizing compare instructions.

    상세보기
67. Luick, David A., System and method for prioritizing store instructions.

    상세보기
68. Farouki,Karim T.; Radigan,James J., System and method for register allocation using SSA construction.

    상세보기
69. Luick, David A, System and method for the scheduling of load instructions within a group priority issue schema for a cascaded pipeline.

    상세보기
70. Fleehart, Timothy G.; Pincus, Jonathan D.; Wallace, Jeffrey S., System and method for whole-system program analysis.

    상세보기
71. Fleehart,Timothy G.; Pincus,Jonathan D.; Wallace,Jeffrey S., System and method for whole-system program analysis.

    상세보기
72. Kurien, James A.; Koutsoukos, Xenofon; Su, Rong, Systems and methods for distributed fault diagnosis using precompiled finite state automata.

    상세보기
73. Jarrett, James H.; Belcher, John E.; Brandes, Russell W.; Brooks, Jeffery W.; Christensen, Bruce A.; Hogan, Keith M.; Kalan, Michael D.; Reichard, Douglas J.; Ritchie, Diane N.; Rodano, Thomas G.; Taylor, Mark E.; Varga, Rae M., Systems and methods that facilitate management of add-on instruction generation, selection, and/or monitoring during execution.

    상세보기
74. Jarrett, James H.; Belcher, John E.; Brandes, Russell W.; Brooks, Jeffery W.; Christensen, Bruce A.; Hogan, Keith M.; Kalan, Michael D.; Reichard, Douglas J.; Ritchie, Diane N.; Rodano, Thomas G.; Taylor, Mark E.; White, Rae M., Systems and methods that facilitate management of add-on instruction generation, selection, and/or monitoring during execution.

    상세보기
75. Nair, Sreekumar Ramakrishnan, Using value-expression graphs for data-flow optimizations.

    상세보기
76. Sachs, Howard G.; Arya, Siamak, VLIW processor and method therefor.

    상세보기
더보기

활용도 Top5 특허

더보기

해당 특허가 속한 카테고리에서 활용도가 높은 상위 5개 콘텐츠를 보여줍니다.
더보기 버튼을 클릭하시면 더 많은 관련자료를 살펴볼 수 있습니다.