초록 ▼

A system and method for transferring data in a multiprocessor architecture capable of supporting multiple processors. The system comprises a priority assignor that provides a dynamic priority to input/output unit (IOU), D-cache and I-cache devices requests as a function of an intrinsic priority assi

A system and method for transferring data in a multiprocessor architecture capable of supporting multiple processors. The system comprises a priority assignor that provides a dynamic priority to input/output unit (IOU), D-cache and I-cache devices requests as a function of an intrinsic priority assigned to each device and a plurality of factors including the existence of a row match between a requested address and a previously serviced request, the number of times a device has been denied service and the number of times a device has been serviced without interruption. The system also includes a tracker to keep track of the number of times each of the factors occurs and a priority changer to change the priority of the devices as a function of the intrinsic priority and the number.

대표청구항 ▼

[ What is claimed is:] [1.]1. A system for transferring data in a multiprocessor architecture capable of supporting multiple processors comprising:a priority assignor that provides a dynamic priority to input/output unit (IOU), D-cache and I-cache devices requests as a function of an intrinsic prior

[ What is claimed is:] [1.]1. A system for transferring data in a multiprocessor architecture capable of supporting multiple processors comprising:a priority assignor that provides a dynamic priority to input/output unit (IOU), D-cache and I-cache devices requests as a function of an intrinsic priority assigned to each device and a plurality of factors including the existence of a row match between a requested address and a previously serviced request, the number of times a device has been denied service and the number of times a device has been serviced without interruption;a tracker to keep track of the number of times each of said factors occurs; anda priority changer to change the priority of said devices as a function of said intrinsic priority and said number.