초록 ▼

An ultra-large-scale integrated (ULSI) circuit includes MOSFETs which have different threshold voltages and yet have the same channel characteristics. The MOSFETs include gate structures or gate stacks with a silicon and germanium material provided over a seed layer. The seed layer can be a 20-40 .A

An ultra-large-scale integrated (ULSI) circuit includes MOSFETs which have different threshold voltages and yet have the same channel characteristics. The MOSFETs include gate structures or gate stacks with a silicon and germanium material provided over a seed layer. The seed layer can be a 20-40 .ANG. polysilicon layer. An amorphous silicon layer is provided over the silicon and germanium material, and a cap layer is provided over the amorphous silicon layer. The polysilicon material is implanted with lower concentrations of germanium, where lower threshold voltage MOSFETs are required. Over a range of 0-60% concentration of germanium, the threshold voltage can be varied by roughly 240 mV.

대표청구항 ▼

[ What is claimed is:] [1.]1. A gate stack structure above a single crystal substrate, the gate stack structure comprising:a gate insulating layer above the single crystal substrate;a thin semiconductor seed layer disposed above the gate insulating layer;a compound semiconductor layer including germ

[ What is claimed is:] [1.]1. A gate stack structure above a single crystal substrate, the gate stack structure comprising:a gate insulating layer above the single crystal substrate;a thin semiconductor seed layer disposed above the gate insulating layer;a compound semiconductor layer including germanium disposed above the thin semiconductor seed layer;an amorphous semiconductor layer above the compound semiconductor layer; anda silicide layer disposed above the amorphous semiconductor layer, the silicide layer being in contact with the amorphous semiconductor layer, the amorphous semiconductor layer being thicker than the compound semiconductor layer.