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Semiconductor device including a plurality of interconnection layers 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/48
출원번호 US-0353379 (1999-07-15)
우선권정보 JP0014070 (1999-01-22)
발명자 / 주소
  • Amishiro Hiroyuki,JPX
  • Igarashi Motoshige,JPX
출원인 / 주소
  • Mitsubishi Denki Kabushiki Kaisha, JPX
대리인 / 주소
    McDermott, Will & Emery
인용정보 피인용 횟수 : 93  인용 특허 : 4

초록

A semiconductor device including an interconnection structure having superior electrical characteristics and allowing higher speed of operation and lower power consumption even when miniaturized, manufacturing method thereof and a method of designing a semiconductor circuit used in the manufacturing

대표청구항

[ What is claimed is:] [1.]1. A semiconductor device, comprising:a semiconductor substrate having a main surface;a conductive region formed on the main surface of said semiconductor substrate;a first interconnection layer electrically connected to said conductive region, having relatively short line

이 특허에 인용된 특허 (4)

  1. Kumagai Jumpei (Yokohama JPX) Fujii Syuso (Kawasaki JPX), Dynamic memory device with improved wiring layer layout.
  2. Yang Tsung-Ju,TWX ; Wang Chien-Mei,TWX ; Kang Tsung-Kuei,TWX, Method for making intermetal dielectrics (IMD) on semiconductor integrated circuits using low dielectric constant spin-on polymers.
  3. Nagase Hachidai (Hadano JPX) Ishii Tatsuki (Nishitama JPX) Suzuki Katsuyoshi (Hadano JPX), Method of automatic wiring in a semiconductor device.
  4. Taguchi Mitsuru,JPX ; Kadomura Shingo,JPX, Process for producing multi-layer wiring structure.

이 특허를 인용한 특허 (93)

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  35. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
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