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Method of fabricating semiconductor having through hole 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/48
  • H01L-023/52
출원번호 US-0335878 (1999-06-18)
우선권정보 JP0043589 (1998-02-25)
발명자 / 주소
  • Taniguchi Fumihiko,JPX
  • Honna Koji,JPX
  • Kumagaya Yoshikazu,JPX
출원인 / 주소
  • Fujitsu Limited, JPX
대리인 / 주소
    Armstrong, Westerman, Hattori, McLeland & Naughton, LLP
인용정보 피인용 횟수 : 30  인용 특허 : 18

초록 ▼

The semiconductor device includes a semiconductor chip, a tape for mounting the semiconductor chip thereto, an adhesive resin layer interposed between the semiconductor chip and the tape, and solder balls attached to the tape. The method of fabricating the semiconductor chip comprises the step of fo

대표청구항 ▼

[ What is claimed is:] [1.]1. A semiconductor device comprising a semiconductor chip, a tape for mounting said semiconductor chip thereto, an adhesive resin layer interposed between said semiconductor chip and said tape, and solder balls passing through ball mounting holes arranged on said tape, cha

이 특허에 인용된 특허 (18)

  1. Chiappetta Frank Richard, Air-land vehicle with ducted fan vanes providing improved performance.
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  2. Maheshwari Abhay ; Thomas Sunil, Backside encapsulation of tape automated bonding device.
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  3. Fukutomi Naoki,JPX ; Tsubomatsu Yoshiaki,JPX ; Inoue Fumio,JPX ; Yamazaki Toshio,JPX ; Ohhata Hirohito,JPX ; Hagiwara Shinsuke,JPX ; Taguchi Noriyuki,JPX ; Nomura Hiroshi,JPX, Fabrication process of semiconductor package and semiconductor package.
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  4. Ebihara Kazumi,JPX, Leadframe and resin-sealed semiconductor device.
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  5. Haghiri-Tehrani Yahya,DEX, Method and apparatus for making an electronic module for cards.
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  6. Kata Keiichiro (Tokyo JPX) Matsuda Shuichi (Tokyo JPX) Hagimoto Eiji (Tokyo JPX), Method for manufacturing bump leaded film carrier type semiconductor device.
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  7. Newman Keith G. (Sunnyvale CA), Method of making integrated circuit package having multiple bonding tiers.
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  8. Parmentier Paul (Cailly-sur-Eure FRX), Method of manufacturing an identification card and an identification manufactured, for example, by this method.
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  9. Geller Bernard D. (Rockville MD) Tyler Johann U. (Mt. Airy MD) Holdeman Louis B. (Boyds MD) Phelleps Fred R. (Gaithersburg MD) Laird ; III George F. (Baltimore MD), Method of packaging microwave semiconductor components and integrated circuits.
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  10. Kata Keiichiro,JPX ; Matsuda Shuichi,JPX, Process for adhesively bonding a semiconductor chip to a carrier film.
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  11. Wilson Howard P. (Austin TX) Martin Fonzell D. J. (Austin TX), Self-opening vent hole in an overmolded semiconductor device.
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  12. Miyajima Kenji,JPX, Semiconductor apparatus, fabrication method therefor and board frame.
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  13. Horiuchi Michio (Nagano JPX) Harayama Yoichi (Nagano JPX), Semiconductor device and method for manufacturing same.
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  14. Aoki Kazumasa,JPX ; Sota Yoshiki,JPX, Semiconductor device having external connection terminals provided on an interconnection plate and fabrication process t.
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  15. Fujino Junji,JPX ; Hirota Jitsuho,JPX ; Izuta Goro,JPX ; Adachi Akira,JPX, Solder supplying method, solder supplying apparatus and soldering method.
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  16. Horiuchi Michio,JPX ; Harayama Yoichi,JPX, Structure and process for mounting semiconductor chip.
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  17. Dordi Yezdi N., Tape ball grid array package with perforated metal stiffener.
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  18. Akram Salman ; Wark James M., Underfill of bumped or raised die using a barrier adjacent to the sidewall of semiconductor device.
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  1. Chen, James; Wang, Rong-Huei, Ball grid array semiconductor package with resin coated metal core.
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  2. Ahmad,Syed Sajid, Interconnecting substrates for electrical coupling of microelectronic components.
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  3. Ahmad,Syed Sajid, Interconnecting substrates for electrical coupling of microelectronic components.
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  4. Bolken, Todd O., Method and apparatus for packaging a microelectronic die.
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  5. Bolken, Todd O., Method and apparatus for packaging a microelectronic die.
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  6. Bolken, Todd O., Method and apparatus for packaging a microelectronic die.
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  7. Kurita, Hideyuki; Watanabe, Masanao, Method for manufacturing double-sided flexible printed board.
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  8. Kurita,Hideyuki; Watanabe,Masanao, Method for manufacturing double-sided flexible printed board.
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  9. Ahmad, Syed Sajid, Method of Interconnecting substrates for electrical coupling of microelectronic components.
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  10. Cobbley,Chad A., Method of encapsulating interconnecting units in packaged microelectronic devices.
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  11. Cobbley,Chad A., Method of encapsulating packaged microelectronic devices with a barrier.
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  12. Bolken, Todd O., Microelectronic devices and microelectronic die packages.
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  13. Cobbley, Chad A., Packaged microelectronic devices with interconnecting units.
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  14. James, Stephen L.; Cobbley, Chad A., Packaged microelectronic devices with pressure release elements and methods for manufacturing and using such packaged microelectronic devices.
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  15. James,Stephen L.; Cobbley,Chad A., Packaged microelectronic devices with pressure release elements and methods for manufacturing and using such packaged microelectronic devices.
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  16. Jung, Ky hyun; Kim, Heui seog; Kim, Sang jun; Sin, Wha su; Song, Ho geon; Ko, Jun young, Printed circuit board and method thereof and a solder ball land and method thereof.
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  17. Jung, Ky-hyun; Kim, Heui-seog; Kim, Sang-jun; Sin, Wha-su; Song, Ho-geon; Ko, Jun-young, Printed circuit board and method thereof and a solder ball land and method thereof.
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  18. Miyata, Koji, Resin-encapsulated semiconductor device including resin extending beyond edge of substrate.
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  19. Ernst, Georg; Zeiler, Thomas, Semiconductor component having a chip carrier with openings for making contact.
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  20. Takahashi, Noriyuki; Ichitani, Masahiro; Ichitani, legal representative, Rumiko; Ichitani, legal representative, Kazuhiro; Ichitani, legal representative, Sachiyo, Semiconductor device.
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  21. Takahashi,Noriyuki; Ichitani, legal representative,Rumiko; Ichitani, legal representative,Kazuhiro; Ichitani, legal representative,Sachiyo; Ichitani,Masahiro, Semiconductor device.
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  22. Taniguchi, Jun, Semiconductor device and its manufacturing method, a circuit board and an electronic device.
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  23. Dotta, Yoshihisa; Tamaki, Kazuo; Saza, Yasuyuki, Semiconductor device and manufacturing method thereof.
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  24. Lee, Jin Hyuk, Semiconductor device and manufacturing method using a stress-relieving film attached to solder joints.
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  25. Fujii,Tetsuo; Muto,Hiroshi; Yoshihara,Shinji; Inomata,Sumitomo, Semiconductor device and method for producing the same by dicing.
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  26. Fujii, Tetsuo; Fukada, Tsuyoshi; Ao, Kenichi, Semiconductor device having a moveable member therein and a protective member disposed thereon.
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  27. Tetsuo Fujii JP; Tsuyoshi Fukada JP; Hiroshi Muto JP; Kenichi Ao JP; Shinji Yoshihara JP; Sumitomo Inomata JP, Semiconductor device produced by dicing.
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  28. Fujii,Tetsuo; Fukada,Tsuyoshi; Ao,Kenichi, Semiconductor sensor.
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  29. Farnworth, Warren M., Systems and methods for compressing an encapsulant adjacent a semiconductor workpiece.
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  30. Juso, Hiroyuki; Fukui, Yasuki; Yano, Yuji; Ishihara, Seiji, Wiring substrate, semiconductor device and package stack semiconductor device.
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