$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Method for making a thin film of solid material 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/30
  • H01L-021/46
출원번호 US-0463976 (2000-02-14)
우선권정보 FR0010288 (1997-08-12)
국제출원번호 PCT/FR98/01789 (1998-08-11)
§371/§102 date 20000214 (20000214)
국제공개번호 WO-9908316 (1999-02-18)
발명자 / 주소
  • Aspar Bernard,FRX
  • Bruel Michel,FRX
출원인 / 주소
  • Commissariat A l'Energie Atomique, FRX
대리인 / 주소
    Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
인용정보 피인용 횟수 : 157  인용 특허 : 11

초록

The annealing step is carried out to a thermal budget made in relation to the thermal budget of the ionic implantation step and possibly other thermal budgets inferred for other steps, in order to provide said cleavage of the substrate.

대표청구항

[ What is claimed is:] [1.]1. A method of manufacturing a thin film of solid material that includes at least the following steps:a step of ionic implantation through one face of a substrate of the solid material using ions capable of creating in the volume of the substrate, and at a depth close to t

이 특허에 인용된 특허 (11)

  1. Henley Francois J. ; Cheung Nathan W., Controlled cleaning process.
  2. Henley Francois J. ; Cheung Nathan, Controlled cleavage process and device for patterned films.
  3. Henley Francois J. ; Cheung Nathan, Controlled cleavage process using pressurized fluid.
  4. Henley Francois J. ; Cheung Nathan, Controlled cleavage process using pressurized fluid.
  5. Henley Francois J. ; Cheung Nathan W., Method for controlled cleaving process.
  6. Bruel Michel,FRX, Method for inserting a gaseous phase in a sealed cavity by ion implantation.
  7. Bruel Michel (Veurey FRX), Method for placing semiconductive plates on a support.
  8. Henley Francois J. ; Cheung Nathan W., Pressurized microbubble thin film separation process using a reusable substrate.
  9. Bruel Michel (Veurey FRX), Process for the production of a relief structure on a semiconductor material support.
  10. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.
  11. Henley Francois J. ; Cheung Nathan W., Reusable substrate for thin film separation.

이 특허를 인용한 특허 (157)

  1. Pinnington, Thomas Henry; Zahler, James M.; Park, Young-Bae; Ladous, Corinne; Olson, Sean, Bonded intermediate substrate and method of making same.
  2. Pinnington, Thomas Henry; Zahler, James M.; Park, Young-Bae; Tsai, Charles; Ladous, Corinne; Atwater, Jr., Harry A.; Olson, Sean, Bonded intermediate substrate and method of making same.
  3. Sadaka, Mariam; Radu, Ionut, Bonded processed semiconductor structures and carriers.
  4. Sadaka, Mariam; Radu, Ionut, Bonded processed semiconductor structures and carriers.
  5. Mazure, Carlos; Nguyen, Bich-Yen; Sadaka, Mariam, Bonded semiconductor structures and method of forming same.
  6. Sadaka, Mariam, Bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate.
  7. Zahurak, John K.; Tang, Sanh D.; Heineck, Lars P.; Roberts, Martin C.; Mueller, Wolfgang; Liu, Haitao, Circuit structures, memory circuitry, and methods.
  8. Currie,Matthew T., Control of strain in device layers by prevention of relaxation.
  9. Currie,Matthew T., Control of strain in device layers by selective relaxation.
  10. Blake, Julian G.; Murphy, Paul J., Cooled cleaving implant.
  11. Aspar, Bernard; Moriceau, Hubert; Zussy, Marc; Rayssac, Olivier, Detachable substrate or detachable structure and method for the production thereof.
  12. Arneson,Michael R.; Bandy,William R., Die frame apparatus and method of transferring dies therewith.
  13. Wu,Kenneth C.; Fitzgerald,Eugene A.; Taraschi,Gianni; Borenstein,Jeffrey T., Etch stop layer system.
  14. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  15. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  16. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  17. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Gisèle, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  18. Letertre,Fabrice; Ghyselen,Bruno; Rayssac,Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  19. Tang, Sanh D.; Zahurak, John K.; Juengling, Werner, Floating body cell structures, devices including same, and methods for forming same.
  20. Tang, Sanh D.; Zahurak, John K.; Juengling, Werner, Floating body cell structures, devices including same, and methods for forming same.
  21. Tang, Sanh D.; Zahurak, John K.; Juengling, Werner, Floating body cell structures, devices including same, and methods for forming same.
  22. Tang, Sanh D.; Zahurak, John K.; Juengling, Werner, Floating body cell structures, devices including same, and methods for forming same.
  23. Currie, Matthew T., Hybrid fin field-effect transistor structures and related methods.
  24. Joly, Jean-Pierre; Ulmer, Laurent; Parat, Guy, Integrated circuit on high performance chip.
  25. Sandhu, Gurtej S.; Parat, Krishna K., Integrated circuit structures, semiconductor structures, and semiconductor die.
  26. Sadaka, Mariam, Interposers including fluidic microchannels and related structures and methods.
  27. Sadaka, Mariam; Radu, Ionut, Low temperature layer transfer process using donor structure with material in recesses in transfer layer, semiconductor structures fabricated using such methods.
  28. Tang, Sanh D., Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor.
  29. Tang, Sanh D., Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor.
  30. Werkhoven, Christiaan J.; Arena, Chantal, Metallic carrier for layer transfer and methods for forming the same.
  31. Werkhoven, Christiaan J.; Arena, Chantal, Metallic carrier for layer transfer and methods for forming the same.
  32. Bruel, Michel, Method and device for fabricating a layer in semiconductor material.
  33. Sandhu, Gurtej S., Method and structure for integrating capacitor-less memory cell with logic.
  34. Sandhu, Gurtej S., Method and structure for integrating capacitor-less memory cell with logic.
  35. Sandhu, Gurtej S., Method and structure for integrating capacitor-less memory cell with logic.
  36. Henley, Francois J.; Lamm, Albert; Adibi, Babak, Method and structure for thick layer transfer using a linear accelerator.
  37. Nguyen, Bich-Yen; Schwarzenbach, Walter; Maleville, Christophe, Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers.
  38. Nguyen, Bich-Yen; Schwarzenbach, Walter; Maleville, Christophe, Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers.
  39. Nguyen, Bich-Yen; Sadaka, Mariam; Maleville, Christophe, Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures.
  40. Nguyen, Bich-Yen; Sadaka, Mariam; Maleville, Christophe, Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures.
  41. Nguyen, Bich-Yen; Sadaka, Mariam; Maleville, Christophe, Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures.
  42. Sadaka, Mariam; Nguyen, Bich-Yen; Radu, Ionut, Method for fabricating semiconductor structures including transistor channels having different strain states, and related semiconductor structures.
  43. Fournel, Franck; Moriceau, Hubert; Lagahe, Christelle, Method for making a stressed structure designed to be dissociated.
  44. Deguet, Chrystel; Clavelier, Laurent, Method for making a thin-film element.
  45. Kub, Francis J.; Hobart, Karl D., Method for making electro-optical devices using a hydrogenion splitting technique.
  46. Aspar, Bernard; Lagahe, Christelle; Ghyselen, Bruno, Method for making thin layers containing microcomponents.
  47. Tauzin, Aurélie; Dechamp, Jérôme; Mazen, Frédéric; Madeira, Florence, Method for preparing thin GaN layers by implantation and recycling of a starting substrate.
  48. Nguyen, Nguyet-Phuong; Cayrefourcq, Ian; Lagahe-Blanchard, Christelle; Bourdelle, Konstantin; Tauzin, Aurélie; Fournel, Franck, Method for self-supported transfer of a fine layer by pulsation after implantation or co-implantation.
  49. Feng Zhou ; Seng-Tiong Ho, Method for the formation of a thin optical crystal layer overlying a low dielectric constant substrate.
  50. Nguyen, Nguyet-Phuong; Cayrefourcq, Ian; Lagahe-Blanchard, Christelle, Method of catastrophic transfer of a thin film after co-implantation.
  51. Cayrefourcq,Ian; Mohamed,Nadia Ben; Lagahe Blanchard,Christelle; Nguyen,Nguyet Phuong, Method of detaching a thin film at moderate temperature after co-implantation.
  52. Tauzin, Aurélie; Faure, Bruce; Garnier, Arnaud, Method of detaching a thin film by melting precipitates.
  53. Cheng,Zhiyuan; Fitzgerald,Eugene A.; Antoniadis,Dimitri A., Method of fabricating a semiconductor structure that includes transferring one or more material layers to a substrate and smoothing an exposed surface of at least one of the material layers.
  54. Faure, Bruce; Di Cioccio, Lea, Method of fabricating an epitaxially grown layer.
  55. Faure, Bruce; Di Cioccio, Lea, Method of fabricating an epitaxially grown layer.
  56. Faure, Bruce; Letertre, Fabrice, Method of fabricating an epitaxially grown layer.
  57. Faure, Bruce; Letertre, Fabrice, Method of fabricating an epitaxially grown layer.
  58. Faure, Bruce; Letertre, Fabrice; Ghyselen, Bruno, Method of fabricating heteroepitaxial microstructures.
  59. Faure,Bruce; Letertre,Fabrice; Ghyselen,Bruno, Method of fabricating heteroepitaxial microstructures.
  60. Maurice,Thibaut; Guiot,Eric, Method of manufacturing a material compound wafer.
  61. Bruel, Michel, Method of producing a plate-shaped structure, in particular, from silicon, use of said method and plate-shaped structure thus produced, in particular from silicon.
  62. Deguet, Chrystel; Clavelier, Laurent; Dechamp, Jerome, Method of transferring a thin film onto a support.
  63. Fournel, Franck, Method of transferring a thin layer onto a target substrate having a coefficient of thermal expansion different from that of the thin layer.
  64. Arneson, Michael R.; Bandy, William R., Method, system, and apparatus for transfer of dies using a die plate having die cavities.
  65. Arena, Chantal, Methods and structures for altering strain in III-nitride materials.
  66. Letertre, Fabrice; Ghyselen, Bruno, Methods for fabricating a substrate.
  67. Letertre,Fabrice; Ghyselen,Bruno, Methods for fabricating a substrate.
  68. Fitzgerald,Eugene; Currie,Matthew, Methods for fabricating strained layers on semiconductor substrates.
  69. Sadaka, Mariam, Methods for fabrication of semiconductor structures including interposers with conductive vias, and related structures and devices.
  70. Sadaka, Mariam; Aspar, Bernard; Blanchard, Chrystelle Lagahe, Methods for fabrication of semiconductor structures using laser lift-off process, and related semiconductor structures.
  71. Langdo, Thomas A.; Currie, Matthew T.; Hammond, Richard; Lochtefeld, Anthony J.; Fitzgerald, Eugene A., Methods for forming III-V semiconductor device structures.
  72. Langdo, Thomas A.; Currie, Matthew T.; Hammond, Richard; Lochtefeld, Anthony J.; Fitzgerald, Eugene A., Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain.
  73. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes.
  74. Sinha, Nishant; Parat, Krishna K., Methods for forming three-dimensional memory devices, and related structures.
  75. Sinha, Nishant; Parat, Krishna K., Methods for forming three-dimensional memory devices, and related structures.
  76. Boussagol, Alice; Faure, Bruce; Ghyselen, Bruno; Letertre, Fabrice; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Gisèle, Methods for making substrates and substrates formed therefrom.
  77. Boussagol, Alice; Faure, Bruce; Ghyselen, Bruno; Letertre, Fabrice; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Giséle, Methods for making substrates and substrates formed therefrom.
  78. Schwarzenbach, Walter; Ben Mohamed, Nadia; Maleville, Christophe; Maunand Tussot, Corinne, Methods for minimizing defects when transferring a semiconductor useful layer.
  79. Letertre, Fabrice, Methods of fabricating semiconductor structures and devices using glass bonding layers, and semiconductor structures and devices formed by such methods.
  80. Arena, Chantal; McFelea, Heather, Methods of fabricating semiconductor structures and devices using quantum dot structures and related structures.
  81. Letertre, Fabrice, Methods of fabricating semiconductor structures and devices with strained semiconductor material.
  82. Arena, Chantal, Methods of fabricating semiconductor structures or devices using layers of semiconductor material having selected or controlled lattice parameters.
  83. Arena, Chantal, Methods of fabricating semiconductor structures or devices using layers of semiconductor material having selected or controlled lattice parameters.
  84. Werkhoven, Christiaan J.; Arena, Chantal, Methods of fabricating semiconductor structures using thermal spray processes, and semiconductor structures fabricated using such methods.
  85. Sadaka, Mariam, Methods of forming III-V semiconductor structures using multiple substrates, and semiconductor devices fabricated using such methods.
  86. Sadaka, Mariam; Nguyen, Bich-Yen, Methods of forming bonded semiconductor structures in 3D integration processes using recoverable substrates, and bonded semiconductor structures formed by such methods.
  87. Nguyen, Bich-Yen; Sadaka, Mariam, Methods of forming bonded semiconductor structures including interconnect layers having one or more of electrical, optical, and fluidic interconnects therein, and bonded semiconductor structures formed using such methods.
  88. Sadaka, Mariam, Methods of forming bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate, and semiconductor structures formed by such methods.
  89. Sadaka, Mariam; Radu, Ionut, Methods of forming bonded semiconductor structures using a temporary carrier having a weakened ion implant region for subsequent separation along the weakened region.
  90. Currie,Matthew T., Methods of forming hybrid fin field-effect transistor structures.
  91. Sandhu, Gurtej S.; Parat, Krishna K., Methods of forming integrated circuits using donor and acceptor substrates.
  92. Arena, Chantal, Methods of forming layers of semiconductor material having reduced lattice strain, semiconductor structures, devices and engineered substrates including same.
  93. Letertre, Fabrice; Faure, Bruce; Krames, Michael R.; Gardner, Nathan F., Methods of forming relaxed layers of semiconductor materials, semiconductor structures, devices and engineered substrates including same.
  94. Werkhoven, Christiaan J., Methods of forming semiconductor structures including III-V semiconductor material using substrates comprising molybdenum.
  95. Werkhoven, Christiaan J., Methods of forming semiconductor structures including III-V semiconductor material using substrates comprising molybdenum, and structures formed by such methods.
  96. Sadaka, Mariam; Aspar, Bernard; Blanchard, Chrystelle Lagahe, Methods of forming semiconductor structures including MEMS devices and integrated circuits on common sides of substrates, and related structures and devices.
  97. Sadaka, Mariam; Aspar, Bernard; Blanchard, Chrystelle Lagahe, Methods of forming semiconductor structures including MEMS devices and integrated circuits on opposing sides of substrates, and related structures and devices.
  98. Langdo, Thomas A.; Currie, Matthew T.; Hammond, Richard; Lochtefeld, Anthony J.; Fitzgerald, Eugene A., Methods of forming strained-semiconductor-on-insulator device structures.
  99. Lochtefeld,Anthony J.; Langdo,Thomas A.; Hammond,Richard; Currie,Matthew T.; Braithwaite,Glyn; Fitzgerald,Eugene A., Methods of forming strained-semiconductor-on-insulator finFET device structures.
  100. Nguyen, Bich-Yen; Sadaka, Mariam, Methods of forming three dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates.
  101. Nguyen, Bich-Yen; Sadaka, Mariam, Methods of forming three-dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates.
  102. Bruel, Michel; Aspar, Bernard; Lagahe-Blanchard, Chrystelle, Methods of making substrate structures having a weakened intermediate layer.
  103. Sadaka, Mariam; Radu, Ionut, Methods of providing thin layers of crystalline semiconductor material, and related structures and devices.
  104. Sadaka, Mariam; Radu, Ionut, Methods of transferring layers of material in 3D integration processes and related structures and devices.
  105. Tang, Sanh D.; Zahurak, John K., Methods, structures and devices for increasing memory density.
  106. Tang, Sanh D.; Zahurak, John K., Methods, structures and devices for increasing memory density.
  107. Newman, Fred, Photoactive devices having low bandgap active layers configured for improved efficiency and related methods.
  108. Beneyton, Remi; Moriceau, Hubert; Fournel, Frank; Rieutord, Francois; Le Tiec, Yannick, Process for assembling substrates with low-temperature heat treatments.
  109. Schwarzenbach, Walter; Maleville, Christophe, Process for detaching layers of material.
  110. Schwarzenbach,Walter; Maleville,Christophe, Process for detaching layers of material.
  111. Cheng, Zhi-Yuan; Fitzgerald, Eugene A.; Antoniadis, Dimitri A.; Hoyt, Judy L., Process for producing semiconductor article using graded epitaxial growth.
  112. Moriceau, Hubert; Bruel, Michel; Aspar, Bernard; Maleville, Christophe, Process for the transfer of a thin film.
  113. Moriceau,Hubert; Bruel,Michel; Aspar,Bernard; Maleville,Christophe, Process for the transfer of a thin film.
  114. Moriceau, Hubert; Bruel, Michel; Aspar, Bernard; Maleville, Christophe, Process for the transfer of a thin film comprising an inclusion creation step.
  115. Tang, Sanh D.; Zahurak, John K., Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same.
  116. Tang, Sanh D.; Zahurak, John K., Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same.
  117. Tang, Sanh D.; Zahurak, John K., Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same.
  118. Tang, Sanh D.; Zahurak, John K., Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same.
  119. Cheng, Zhiyuan; Fitzgerald, Eugene A.; Antoniadis, Dimitri A., Semiconductor device structure.
  120. Tang, Sanh D.; Zhang, Ming, Semiconductor devices including a diode structure over a conductive strap and methods of forming such semiconductor devices.
  121. Tang, Sanh D.; Zhang, Ming, Semiconductor devices including a diode structure over a conductive strap and methods of forming such semiconductor devices.
  122. Werkhoven, Christiaan J.; Arena, Chantal, Semiconductor devices including substrate layers and overlying semiconductor layers having closely matching coefficients of thermal expansion, and related methods.
  123. Sinha, Nishant; Sandhu, Gurtej S.; Smythe, John, Semiconductor material manufacture.
  124. Gadkaree,Kishor Purushottam, Semiconductor on glass insulator made using improved ion implantation process.
  125. Cherekdjian, Sarko, Semiconductor structure made using improved multiple ion implantation process.
  126. Cherekdjian, Sarko, Semiconductor structure made using improved multiple ion implantation process.
  127. Cherekdjian, Sarko, Semiconductor structure made using improved pseudo-simultaneous multiple ion implantation process.
  128. Cherekdjian, Sarko, Semiconductor structure made using improved simultaneous multiple ion implantation process.
  129. Letertre, Fabrice, Semiconductor structures and devices including semiconductor material on a non-glassy bonding layer.
  130. Debray, Jean-Philippe; Arena, Chantal; McFavilen, Heather, Semiconductor structures having active regions comprising InGaN and methods of forming such semiconductor structures.
  131. Arena, Chantal; Debray, Jean-Philippe; Kern, Richard Scott, Semiconductor structures having active regions comprising InGaN, methods of forming such semiconductor structures, and light emitting devices formed from such semiconductor structures.
  132. Debray, Jean-Philippe; Arena, Chantal; McFavilen, Heather, Semiconductor structures having active regions comprising InGaN, methods of forming such semiconductor structures, and light emitting devices formed from such semiconductor structures.
  133. Debray, Jean-Philippe; Arena, Chantal; McFavilen, Heather; Ding, Ding; Huang, Li, Semiconductor structures having active regions comprising InGaN, methods of forming such semiconductor structures, and light emitting devices formed from such semiconductor structures.
  134. Arena, Chantal; Debray, Jean-Philippe; Kern, Richard Scott, Semiconductor structures having active regions comprising ingan, methods of forming such semiconductor structures, and light emitting devices formed from such semiconductor structures.
  135. Debray, Jean-Philippe; Arena, Chantal; McFavilen, Heather; Ding, Ding; Huang, Li, Semiconductor structures having active regions including indium gallium nitride, methods of forming such semiconductor structures, and related light emitting devices.
  136. Sadaka, Mariam, Semiconductor structures including fluidic microchannels for cooling and related methods.
  137. Sadaka, Mariam, Semiconductor structures including fluidic microchannels for cooling and related methods.
  138. Arena, Chantal, Semiconductor structures, devices and engineered substrates including layers of semiconductor material having reduced lattice strain.
  139. Arena, Chantal, Semiconductor structures, devices and engineered substrates including layers of semiconductor material having reduced lattice strain.
  140. Ogura, Atsushi, Semiconductor substrate manufacturing method and semiconductor device manufacturing method, and semiconductor substrate and semiconductor device manufactured by the methods.
  141. Tang, Sanh D.; Zhang, Ming; Bayless, Andrew M.; Zahurak, John K., Semiconductor-metal-on-insulator structures, methods of forming such structures, and semiconductor devices including such structures.
  142. Moriceau, Hubert; Aspar, Bernard; Margail, Jacques, Stacked structure and production method thereof.
  143. Letertre, Fabrice; Bethoux, Jean-Marc; Boussagol, Alice, Strain engineered composite semiconductor substrates and methods of forming same.
  144. Werkhoven, Christiaan J., Strain relaxation using metal materials and related structures.
  145. Werkhoven, Christiaan J., Strain relaxation using metal materials and related structures.
  146. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained germanium-on-insulator device structures.
  147. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator device structures.
  148. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator device structures.
  149. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator device structures with elevated source/drain regions.
  150. Langdo,Thomas A.; Currie,Matthew T.; Braithwaite,Glyn; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator finFET device structures.
  151. Tauzin,Aur��lie, Thin film splitting method.
  152. Tang, Sanh D., Thyristor based memory cells, devices and systems including the same and methods for forming the same.
  153. Tang, Sanh D., Thyristor-based memory cells, devices and systems including the same and methods for forming the same.
  154. Tang, Sanh D., Thyristor-based memory cells, devices and systems including the same and methods for forming the same.
  155. Nemati, Farid; Robins, Scott T.; Gupta, Rajesh N., Thyristors.
  156. Nemati, Farid; Robins, Scott T.; Gupta, Rajesh N., Thyristors, methods of programming thyristors, and methods of forming thyristors.
  157. Berne, Cecile; Ghyselen, Bruno; Lagahe, Chrystelle; Maurice, Thibaut, Two-stage annealing method for manufacturing semiconductor substrates.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로