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Open-cavity semiconductor die package 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
출원번호 US-0218180 (1998-12-22)
발명자 / 주소
  • Crane
  • Jr. Stanford W.
  • Krishnapura Lakshminarasimha
  • Li Yun
출원인 / 주소
  • Silicon Bandwidth, Inc.
대리인 / 주소
    Morgan, Lewis & Bockius LLP
인용정보 피인용 횟수 : 22  인용 특허 : 21

초록

A semiconductor die carrier includes a housing that defines a cavity for holding one or more semiconductor dies, electrically conductive leads, and a cover plate having an aperture formed therethrough. The housing includes insulative side walls and a end plate joined to the side walls. The side wall

대표청구항

[ What is claimed is:] [14.]14. A semiconductor die package comprising:a housing defining a cavity for holding at least one semiconductor die, said housing including a plurality of insulative side walls and an end plate joined to said side walls, wherein the thickness of the end plate is greater tha

이 특허에 인용된 특허 (21)

  1. Scherer Jeremy D. (Dartmouth MA) Tower Steven A. (Dartmouth MA), All metal flat package for microcircuitry.
  2. Goldfarb Samuel (21 Sycamore Dr. Roslyn ; County of Nassau NY 11576), Electronic component package with multiconductive base forms for multichannel mounting.
  3. Dudderar Thomas Dixon ; Han Byung Joon,KRX ; Raju Venkataram Reddy ; Shevchuk George John, Electronic device package enclosed by pliant medium laterally confined by a plastic rim member.
  4. Broom Ronald F. (Zurich CHX), Encapsulated light emitting diodes.
  5. Salera Edmond A. (Santa Barbara CA), Hybrid microelectronic circuit package.
  6. Krumme John F. (Woodside CA) Hodgson Darel E. (Palo Alto CA), Integrated circuit package and seal therefor.
  7. Moulton Walter L. (Phoenix AZ) Ogden Paul A. (Phoenix AZ) Wang Shay-Ping (Tempe AZ), Integrated circuit package with removable shield.
  8. Koepke Richard A. (New Bedford MA) Koepke George O. (Rochester NY), Method for fabricating a fold-up frame.
  9. Smith Donald A. (Union City PA) Carter William H. (Union City PA) Dingfelder Howard E. (Corry PA) Burgess Dale L. (Union City PA) Gates Alan B. (Corry PA), Method for making plastic leaded chip carrier.
  10. Cabaud Aim (28 ; rue de Villacoublay Velizy FRX), Method of applying contacts to circuit support.
  11. Hingorany Prem R. (Broomfield CO), Method of manufacture power hybrid microcircuit.
  12. Gates ; Jr. Louis E. (Westlake Village CA) Kamensky Albert (Redondo Beach CA) Devendorf Don C. (Los Angeles CA), Microelectronic package.
  13. Selinko George J. (Lighthouse Point FL), Non-hermetically sealed stackable chip carrier package.
  14. Ingram Arthur J. (Allentown PA) Weingrod Irving (Allentown PA), Package for semiconductor integrated circuits.
  15. Kim Jin-Sung (Chungcheongbuk-do KRX) Huh Gi-Rok (Chungcheongbuk-do KRX), Process for manufacturing a resin molded image pick-up semiconductor chip having a window.
  16. Brown Candice H. (San Jose CA), Process of making a semiconductor device having parallel leads directly connected perpendicular to integrated circuit la.
  17. Takahashi Yoshiharu (Itami JPX) Hirose Tetsuya (Itami JPX) Ichiyama Hideyuki (Itami JPX), Semiconductor pressure sensor.
  18. Cox Wilton Louis ; Fieselman Charles David ; Hobgood Leonard Douglas ; Watson ; Jr. Paul Gilbert ; Yu Simon, Snap together PCMCIA cards with laser tack welded seams.
  19. Sano Yoshikazu,JPX ; Terakawa Sumio,JPX ; Tsujii Eiichi,JPX ; Asaumi Masaji,JPX ; Chatani Yoshikazu,JPX, Solid-state image sensing apparatus and manufacturing method thereof.
  20. Dutta Vivek B. (Cupertino CA) Demmin Jeffrey C. (Mt. View CA) DiOrio Mark L. (Cupertino CA) Ewanich Jon T. (Cupertino CA), Stadium-stepped package for an integrated circuit with air dielectric.
  21. Li Zong-Fu ; Sengupta Kabul ; Thompson Deborah L., Windowed non-ceramic package having embedded frame.

이 특허를 인용한 특허 (22)

  1. Brophy, Brenor L.; Lie, James H.; Wright, Andrew J., Apparatus and method for coupling with components in a surface mount package.
  2. Fries, Manfred; Munch, Thomas; Fischbach, Reinhard, Biometric sensor and method for its production.
  3. Pezzani,Robert, Capacitive microsensor.
  4. Waga, Satoshi; Morita, Sumihito; Sakurai, Masaru; Yamatani, Masaya; Kamimura, Hideki, Capacitive type humidity sensor and manufacturing method thereof.
  5. Manansala,Michael C., Chip carrier for fingerprint sensor.
  6. Erhart, Richard Alexander; Nelson, Richard Brian; Wickboldt, Paul, Fingerprint sensor and integratable electronic display.
  7. Erhart, Richard Alexander; Nelson, Richard Brian; Wickboldt, Paul, Fingerprint sensor and integratable electronic display.
  8. Erhart, Richard Alexander; Nelson, Richard Brian; Wickboldt, Paul, Fingerprint sensor and integratable electronic display.
  9. Manansala, Michael, Fingerprint sensor and interconnect.
  10. Siu, Paul, Hermetically sealed component assembly package.
  11. Fischbach, Reinhard; Fries, Manfred; Zaeske, Manfred, Housing assembly for an electronic device and method of packaging an electronic device.
  12. Erhart, Richard Alex, Integrated fingerprint sensor and display.
  13. Hsu, Mao-Hsiu; Ting, Kuan-Pao, Jig and manufacturing method for fingerprint identification module.
  14. Haines, Michael D., Method and apparatus for increasing the immunity of new generation microprocessors from ESD events.
  15. Haines,Michael D., Method and apparatus for protecting a die ESD events.
  16. Suzuki,Kiyoshi; Suzuki,Osamu, Method for removing static electricity in fingerprint-reading apparatus, fingerprint reading apparatus and data terminal provided with fingerprint-reading apparatus.
  17. Fries, Manfred; M?nch, Thomas; Fischbach, Reinhard, Method of producing a biometric sensor.
  18. Manansala,Michael, Method of sensor packaging.
  19. Delbaere, Fabien Xavier; Seiberle, Hubert; Studer, Peggy, Optical biometric security element.
  20. Chiu, Anthony M., Surface mount package with integral electro-static charge dissipating ring using lead frame as ESD device.
  21. Chiu,Anthony M., Surface mount package with integral electro-static charge dissipating ring using lead frame as ESD device.
  22. Manansala, Michael, System for providing an open-cavity low profile encapsulated semiconductor package.
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