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Passivation layer and process for semiconductor devices 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/58
출원번호 US-0143680 (1998-08-28)
발명자 / 주소
  • Schmitz Adele E.
  • Brown Julia J.
출원인 / 주소
  • Hughes Electronics Corporation
대리인 / 주소
    Duraiswamy
인용정보 피인용 횟수 : 35  인용 특허 : 20

초록 ▼

A semiconductor passivation technique uses a plasma enhanced chemical vapor deposition (PECVD) process to produce a silicon-rich nitride film as a passivation layer on a Group III-V semiconductor device. The silicon-rich film has a nitrogen to silicon ratio of about 0.7, has a relatively high index

대표청구항 ▼

[ What is claimed is:] [1.]1. A semiconductor device comprising:a semiconductor material having a surface; anda compressively stressed silicon nitride passivation layer disposed on the surface of the semiconductor material, wherein the semiconductor material is a Group III-V gallium nitride (GaN) se

이 특허에 인용된 특허 (20)

  1. Mahon Steven S. (Urbana IL) Brophy Martin J. (Urbana IL) Hoskins Michael J. (Mahomet IL), Acoustic charge transport integrated circuit process.
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  2. Delaney Joseph Baxter ; Bracey Kirk Edwin, Collector up heterojunction bipolar transistor.
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  3. Moyer Curtis D. (Pheonix AZ) Voight Steven A. (Gilbert AZ), Fabricating a low leakage current LED.
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  4. Herndon Terry O. (Carlisle MA) Chapman Glenn H. (Bedford MA), Fabrication of interlayer conductive paths in integrated circuits.
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  5. DiLorenzo James V. (Millington NJ) Hwang James C. (Berkeley Heights NJ) Niehaus William C. (Wyomissing PA) Schlosser Wolfgang O. W. (Basking Ridge NJ) Wemple Stuart H. (Chatham Township ; Morris Coun, GaAs FETs Having long-term stability.
    상세보기
  6. Williams Richard K. (Cupertino CA) Cornell Michael E. (Campbell CA) Chang Mike (Cupertino CA) Grasso David (San Jose CA) Yeung Agnes (Saratoga CA) Chuang Juiping (Cupertino CA), Lightly-doped drain MOSFET with improved breakdown characteristics.
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  7. Durschlag Mark S. (Natick MA) Vorhaus James L. (Newton MA), Lumped passive components and method of manufacture.
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  8. Chakrabarti Utpal Kumar (Allentown PA) Hobson William Scott (Summit NJ) Ren Fan (Warren NJ) Schnoes Melinda Lamont (South Amboy NJ), Method of making a GaAs-based laser comprising a facet coating with gas phase sulphur.
    상세보기
  9. Shichijo Hisashi (Garland TX), Method of making planarized heterostructures using selective epitaxial growth.
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  10. Shanfield Stanley R. (West Newton MA) Patel Bharat (Nashua NH) Statz Hermann (Wayland MA), Method of manufacturing a III-V semiconductor device using a self-biased substrate and a plasma containing an electroneg.
    상세보기
  11. Bass ; Jr. Roy S. (Underhill VT) Bhattacharyya Arup (Essex Junction VT) Grise Gary D. (Colchester VT), Non-volatile memory cell having Si rich silicon nitride charge trapping layer.
    상세보기
  12. Pai Damodar M. (Fairport NY) DeFeo Paul J. (Ontario NY), Overcoated amorphous silicon imaging members.
    상세보기
  13. Allen Bert L. (Los Altos CA) Gwozdz Peter S. (Cupertino CA) Bowers Thomas R. (Austin TX), Passivation for integrated circuit structures.
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  14. Venkatesan Suresh (Austin TX) Poon Stephen (Austin TX), Process for fabricating a semiconductor device using dual planarization layers.
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  15. Knolle, William R.; Osenbach, John W., Resistive field shields for high voltage devices.
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  16. Iwata Hiroshi (Osaka JPX) Noguchi Shigeru (Osaka JPX) Ishida Satoshi (Osaka JPX) Sano Keiichi (Osaka JPX) Nakayama Shoichiro (Osaka JPX), Semiconductor device which relieves internal stress and prevents cracking.
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  17. Brown William D. (Fayetteville AR) Khaliq Muhammad A. (Mankato MN), Silicon nitride for application as the gate dielectric in MOS devices.
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  18. Peters, John W., Silicon oxynitride material and photochemical process for forming same.
    상세보기
  19. Thornton Robert L. ; Bringans Ross D. ; Connell G. A. Neville ; Treat David W. ; Bour David P. ; Ponce Fernando A. ; Johnson Noble M. ; Beernink Kevin J., Thermally processed, phosphorus- or arsenic-containing semiconductor laser with selective IILD.
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  20. Cohen Simon S. (Burlington MA) Raffel Jack I. (Lexington MA), Voltage programmable links programmed with low current transistors.
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이 특허를 인용한 특허 (35)

  1. Martin E. Kordesch, Band gap engineering of amorphous Al-Ga-N alloys.
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  2. Belyansky,Michael P.; Boyd,Diane C.; Doris,Bruce B.; Gluschenkov,Oleg, CMOS transistor structure including film having reduced stress by exposure to atomic oxygen.
    상세보기
  3. Chini, Alessandro; Mishra, Umesh K.; Parikh, Primit; Wu, Yifeng, Fabrication of single or multiple gate field plates.
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  4. Chini, Alessandro; Mishra, Umesh K.; Parikh, Primit; Wu, Yifeng, Fabrication of single or multiple gate field plates.
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  5. Chini, Alessandro; Mishra, Umesh Kumar; Parikh, Primit; Wu, Yifeng, Fabrication of single or multiple gate field plates.
    상세보기
  6. Sakamoto, Ryoji; Nakajima, Shigeru, Field-effect transistor.
    상세보기
  7. Wu, Yifeng; Zhang, Naiqing; Xu, Jian; Mc Carthy, Lee, Group III nitride based FETs and HEMTs with reduced trapping and method for producing the same.
    상세보기
  8. Heikman, Sten; Wu, Yifeng, High temperature performance capable gallium nitride transistor.
    상세보기
  9. Heikman, Sten; Wu, Yifeng, High temperature performance capable gallium nitride transistor.
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  10. Wu, Yifeng; Parikh, Primit; Mishra, Umesh, High voltage GaN transistor.
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  11. Wu, Yifeng; Parikh, Primit; Mishra, Umesh, High voltage GaN transistor.
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  12. Wu, Yifeng; Parikh, Primit; Mishra, Umesh, High voltage GaN transistors.
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  13. Wu, Yifeng; Parikh, Primit; Mishra, Umesh, High voltage GaN transistors.
    상세보기
  14. Sun,Sey Ping, In-situ nitride/oxynitride processing with reduced deposition surface pattern sensitivity.
    상세보기
  15. Krutko, Oleh; Witkowski, Larry, Integrated capacitor having an overhanging top capacitor plate.
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  16. Nichols, Kirby B.; Actis, Robert; Xu, Dong; Kong, Wendell M. T., Low-temperature-grown (LTG) insulated-gate PHEMT device and method.
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  17. Nishi, Masahiro, Method for fabricating semiconductor device including performing oxygen plasma treatment.
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  18. Zhang, An-Ping; Kretchmer, James; Kaminsky, Jr., Edmund, Method for making GaN-based high electron mobility transistor.
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  19. Sharma, Umesh; Gee, Harry Yue; Holland, Phillip Gene, Method of making reliable wafer level chip scale package semiconductor devices.
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  20. Sheppard, Scott Thomas; Allen, Scott Thomas; Palmour, John Williams, Nitride based transistors on semi-insulating silicon carbide substrates.
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  21. Chitnis, Ashay, Ohmic contacts to nitrogen polarity GaN.
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  22. Belyansky, Michael P.; Boyd, Diane C.; Doris, Bruce B.; Gluschenkov, Oleg, Oxidation method for altering a film structure.
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  23. Belyansky,Michael P.; Boyd,Diane C.; Doris,Bruce B.; Gluschenkov,Oleg, Oxidation method for altering a film structure and CMOS transistor structure formed therewith.
    상세보기
  24. Schmitz, Adele E.; Brown, Julia J., Passivation layer and process for semiconductor devices.
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  25. Vogt,Mirko, Plasma-enhanced chemical vapour deposition process for depositing silicon nitride or silicon oxynitride, process for producing one such layer arrangement, and layer arrangement.
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  26. Wu, Yifeng; Moore, Marcia; Wisleder, Tim; Parikh, Primit, Robust transistors with fluorine treatment.
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  27. Wu, Yifeng; Moore, Marcia; Wisleder, Tim; Parikh, Primit, Robust transistors with fluorine treatment.
    상세보기
  28. Shields, Andrew James, Semiconductor device.
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  29. Donofrio, Matthew; Ibbetson, James; Yao, Zhimin Jamie, Semiconductor light emitting diodes having reflective structures and methods of fabricating same.
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  30. Rajagopalan, Nagarajan; Han, Xinhai; Yamase, Ryan; Park, Ji Ae; Patel, Shamik; Nowak, Thomas; Cui, Zhengjiang “David”; Naik, Mehul; Park, Heung Lak; Ding, Ran; Kim, Bok Hoen, Silicon nitride passivation layer for covering high aspect ratio features.
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  31. Parikh, Primit; Heikman, Sten, Transistors and method for making ohmic contact to transistors.
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  32. Seo, Won Cheol; Cho, Dae Sung, Wafer-level light emitting diode and wafer-level light emitting diode package.
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  33. Seo, Won Cheol; Cho, Dae Sung, Wafer-level light emitting diode package and method of fabricating the same.
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  34. Seo, Won Cheol; Cho, Dae Sung, Wafer-level light emitting diode package and method of fabricating the same.
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  35. Green,Bruce M.; Hartin,Olin L.; Lan,Ellen Y.; Li,Philip H.; Miller,Monte G.; Passlack,Matthias; Ray,Marcus R.; Weitzel,Charles E., pHEMT with barrier optimized for low temperature operation.
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