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An interconnect structure of a semiconductor device comprising: a semiconductor substrate; a plurality of interconnects including a subject interconnect; a plurality of interlayer dielectric films disposed between the adjacent interconnects; and a concave or convex portion formed on the surface of t

An interconnect structure of a semiconductor device comprising: a semiconductor substrate; a plurality of interconnects including a subject interconnect; a plurality of interlayer dielectric films disposed between the adjacent interconnects; and a concave or convex portion formed on the surface of the semiconductor device corresponding to the desired portion of the subject interconnect is disclosed. When some deficiency is generated on the subject interconnect, the deficiency can be detected by measuring the corresponding concave or convex portion on the surface of the semiconductor for prompt inspection because the concave or convex portion is connected to the subject interconnect.

대표청구항 ▼

[ What is claimed is:] [1.]1. A semiconductor device allowing easy inspection of an interconnect, said semiconductor device comprising:a semiconductor substrate;a plurality of interconnect layers overlying said semiconductor substrate having a plurality of individual interconnects therein, including

[ What is claimed is:] [1.]1. A semiconductor device allowing easy inspection of an interconnect, said semiconductor device comprising:a semiconductor substrate;a plurality of interconnect layers overlying said semiconductor substrate having a plurality of individual interconnects therein, including a top interconnect layer, wherein at least one of said plurality of interconnect layers contains an interconnect to be inspected;a plurality of interlayer dielectric films each disposed between adjacent two of said plurality of interconnect layers;a top dielectric film disposed on said top interconnect layer; anda dummy interconnect, said dummy interconnect comprising an inspection pad disposed on one of said interlayer dielectric films adjacent to but not connected with any interconnects in a corresponding interconnect layer and overlying said interconnect to be inspected, and an extension part connected between said inspection pad and said interconnect to be inspected but not connected to any other intervening interconnect.