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Method for improvement of planarity of electroplated copper 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • C25D-005/02
  • C25D-007/12
  • C25D-005/10
출원번호 US-0506931 (2000-02-18)
발명자 / 주소
  • Syun-Ming Jang TW
출원인 / 주소
  • Taiwan Semiconductor Manufacturing Company TW
대리인 / 주소
    George O. Saile
인용정보 피인용 횟수 : 21  인용 특허 : 12

초록

A method for electroplating copper in trenches, including the steps of providing a semiconductor substrate having a trench formed therein and electrolytically depositing a first copper containing layer having an upper surface and a predetermined thickness within the trench. The first copper depositi

대표청구항

1. A method for electroplating copper in a trench, the steps comprising:providing a semiconductor structure having a trench formed therein; depositing by electrolysis a first copper containing layer having an upper surface and a predetermined thickness within said trench; said first copper depositio

이 특허에 인용된 특허 (12)

  1. Bernhardt Anthony F. (Berkeley CA) Contolini Robert J. (Pleasanton CA), Electrochemical planarization.
  2. Lee Chwan-Ying,TWX ; Huang Tzuen-Hsi,TWX, Electroless copper plating method for forming integrated circuit structures.
  3. Sandhu Gurtej Sandhu (Boise ID) Yu Chris Chang (Aurora IL), Method for forming a metallization layer.
  4. Tsai Ming-Hsing,TWX ; Tsai Wen-Jye,TWX ; Shue Shau-Lin,TWX ; Yu Chen-Hua,TWX, Method for improvement of gap filling capability of electrochemical deposition of copper.
  5. Nogami Takeshi ; Dubin Valery ; Cheung Robin, Method of electroplating a copper or copper alloy interconnect.
  6. Pan Ju-Don T. (Austin TX), Method of making an electrical multilayer interconnect.
  7. Ting Chiu ; Dubin Valery, Plated copper interconnect structure.
  8. Berdan Betty L. (Willowick OH) Luce Betty M. (Willowick OH), Process for electroforming copper foil.
  9. Jain Ajay, Process for forming a semiconductor device.
  10. Dubin Valery ; Ting Chiu ; Cheung Robin W., Pulse electroplating copper or copper alloys.
  11. 8437 ; 19920400 ; Kenna, Site-selective electrochemical deposition of copper.
  12. Leibovitz Jacques (San Jose CA) Cobarruviaz Maria L. (Cupertino CA) Scholz Kenneth D. (Palo Alto CA) Chao Clinton C. (Redwood City CA), Stacked solid via formation in integrated circuit systems.

이 특허를 인용한 특허 (21)

  1. Weidman, Timothy W.; Wijekoon, Kapila P.; Zhu, Zhize; Gelatos, Avgerinos V. (Jerry); Khandelwal, Amit; Shanmugasundram, Arulkumar; Yang, Michael X.; Mei, Fang; Moghadam, Farhad K., Contact metallization scheme using a barrier layer over a silicide layer.
  2. Nagai, Mizuki; Okuyama, Shuichi; Kimizuka, Ryoichi; Kobayashi, Takeshi, Copper-plating liquid, plating method and plating apparatus.
  3. Stewart, Michael P.; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Eaglesham, David J., Electroless deposition process on a silicon contact.
  4. Stewart, Michael P.; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Eaglesham, David J., Electroless deposition process on a silicon contact.
  5. Liu,Chi Wen; Feng,Hsien Ping; Tsao,Jung Chih, Method and apparatus for copper film quality enhancement with two-step deposition.
  6. Basol,Bulent M.; Talieh,Homayoun; Uzoh,Cyprian E., Method for electrochemically processing a workpiece.
  7. Lopatin,Sergey; Shanmugasundram,Arulkumar; Lubomirsky,Dmitry; Pancham,Ian A., Method for forming CoWRe alloys by electroless deposition.
  8. Kiran Kumar ; Zhihai Wang ; Wilbur G. Gatabay, Method for forming barrier and seed layer.
  9. Shim,Dong sik; Na,Kyung won; Choi,Sang on; Park,Hae seok, Method for manufacturing metal structure using trench.
  10. Marxsen, Gerd; Preusse, Axel; Nopper, Markus; Mauersberger, Frank, Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent CMP process.
  11. Scherer, Axel; Wong, Joyce, Method of electroplating of high aspect ratio metal structures into semiconductors.
  12. Tsao,Jung Chih; Li,Chi Wen; Chen,Kei Wei; Hsu,Jye Wei; Fong,Hsien Pin; Lin,Steven; Chuang,Ray, Method to reduce Rs pattern dependence effect.
  13. Teerlinck, Ivo; Mertens, Paul, Multi-step method for metal deposition.
  14. Lubomirsky, Dmitry; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Kovarsky, Nicolay Y.; Wijekoon, Kapila, Process for electroless copper deposition.
  15. Bailey, III,Andrew D.; Ni,Tuqiang, Small volume process chamber with hot inner surfaces.
  16. Bailey, III,Andrew D.; Ravkin,Michael; Korolik,Mikhail; Yadav,Puneet, Stress free etch processing in combination with a dynamic liquid meniscus.
  17. Bailey, III,Andrew D.; Lohokare,Shrikant P., System and method for stress free conductor removal.
  18. Bailey, III,Andrew D.; Lohokare,Shrikant P., System and method for surface reduction, passivation, corrosion prevention and activation of copper surface.
  19. Lohokare, Shrikant P.; Bailey, III, Andrew D.; Hemker, David; Cook, Joel M., System, method and apparatus for improved global dual-damascene planarization.
  20. Lohokare, Shrikant P.; Bailey, III, Andrew D.; Hemker, David; Cook, Joel M., System, method and apparatus for improved local dual-damascene planarization.
  21. Bailey, III,Andrew D.; Lohokare,Shrikant P.; Howald,Arthur M.; Kim,Yunsang, System, method and apparatus for self-cleaning dry etch.
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