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Methods and apparatus for shallow trench isolation 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • C23C-016/52
  • C23C-016/22
  • G05B-019/00
  • G05D-007/00
  • G05D-011/02
출원번호 US-0613934 (2000-07-11)
발명자 / 주소
  • Ellie Yieh
  • Li-Qun Xia
  • Srinivas Nemani
출원인 / 주소
  • Applied Materials, Inc.
대리인 / 주소
    Townsend & Townsend & Crew
인용정보 피인용 횟수 : 62  인용 특허 : 14

초록 ▼

The present invention provides systems, methods and apparatus for high temperature (at least about 500-800.degree. C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce to

대표청구항 ▼

1. A substrate processing system comprising:a vacuum chamber, said vacuum chamber operable at a pressure between about 10-760 torr; a gas distribution manifold, located within said housing, to introduce reactive gases into said vacuum chamber; a ceramic heater to hold a wafer, said ceramic heater he

이 특허에 인용된 특허 (14)

  1. Kawada Nobuo (Annaka JPX) Nakajima Ryoji (Annaka JPX) Shindo Toshihiko (Annaka JPX) Nagao Takaaki (Annaka JPX), Ceramic electrostatic chuck with built-in heater.
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  2. Russell Kathleen (Santa Clara CA) Robles Stuardo (Sunnyvale CA) Nguyen Bang C. (Fremont CA) Sivaramakrishnan Visweswaren (Cupertino CA), Chemical vapor deposition reactor system and integrated circuit.
    상세보기
  3. Kimura Noboru (Gunma JPX), Double-layered ceramic heater.
    상세보기
  4. Ravi Tirunelveli S., Low dielectric constant silicon dioxide sandwich layer.
    상세보기
  5. Bhan Mohan Krishan ; Subrahmanyam Sudhakar ; Gupta Anand ; Rana Viren V. S., Method and apparatus for improving film stability of halogen-doped silicon oxide films.
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  6. Bhan Mohan Krishan ; Subrahmanyam Sudhakar ; Gupta Anand ; Rana Viren V. S., Method and apparatus for improving film stability of halogen-doped silicon oxide films.
    상세보기
  7. Gupta Anand ; Rana Virendra V. S. ; Verma Amrita ; Bhan Mohan K. ; Subrahmanyam Sudhakar, Method and apparatus for improving the film quality of plasma enhanced CVD films at the interface.
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  8. Rana Virendra V. S. ; Conners Andrew ; Gupta Anand ; Guo Xin ; Hong Soonil, Method for submicron gap filling on a semiconductor substrate.
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  9. Fong Gary ; Xia Li-Qun ; Nemani Srinivas ; Yieh Ellie, Methods and apparatus for cleaning surfaces in a substrate processing system.
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  10. Yieh Ellie ; Xia Li-Qun ; Gee Paul ; Nguyen Bang, Methods and apparatus for forming ultra-shallow doped regions using doped silicon oxide films.
    상세보기
  11. Yieh Ellie ; Xia Li-Qun ; Nemani Srinivas, Methods for shallow trench isolation.
    상세보기
  12. Fong Gary ; Silvestre Irwin, Substrate processing apparatus with bottom-mounted remote plasma system.
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  13. Guo Ted ; Cohen Barney M. ; Verma Amrita, Thermal post-deposition treatment of halogen-doped films to improve film stability and reduce halogen migration to inter.
    상세보기
  14. Guo Ted ; Cohen Barney M. ; Verma Amrita, Thermal post-deposition treatment of halogen-doped films to improve film stability and reduce halogen migration to interconnect layers.
    상세보기

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  1. Ahn,Kie Y.; Forbes,Leonard, ALD of amorphous lanthanide doped TiOfilms.
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  3. Ahn, Kie Y.; Forbes, Leonard, Apparatus having a lanthanum-metal oxide semiconductor device.
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  4. Derderian, Garo J.; Sandhu, Gurtej Singh, Atomic layer deposition and conversion.
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  5. Derderian, Garo J.; Sandhu, Gurtej Singh, Atomic layer deposition and conversion.
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  6. Ahn, Kie Y.; Forbes, Leonard, Atomic layer deposition of CeO/AlOfilms as gate dielectrics.
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  7. Ahn, Kie Y.; Forbes, Leonard, Atomic layer deposition of a ruthenium layer to a lanthanide oxide dielectric layer.
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  8. Enicks, Darwin Gene; Carver, Damian, Bandgap and recombination engineered emitter layers for SiGe HBT performance optimization.
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  11. Pan,Rong; Ton,Van Q., Deposition of thick BPSG layers as upper and lower cladding for optoelectronics applications.
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  12. Sandhu, Gurtej S.; Durcan, D. Mark, Devices with nanocrystals and methods of formation.
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  13. Sandhu, Gurtej S.; Durcan, D. Mark, Devices with nanocrystals and methods of formation.
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  14. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Dielectrics containing at least one of a refractory metal or a non-refractory metal.
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  15. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Dielectrics containing at least one of a refractory metal or a non-refractory metal.
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  16. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Dielectrics containing at least one of a refractory metal or a non-refractory metal.
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  17. Funk,Merritt; Sundararajan,Radha; Prager,Daniel Joseph; Natzle,Wesley, Dynamic metrology sampling for a dual damascene process.
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  18. Funk, Merritt; Sundararajan, Radha; Prager, Daniel Joseph; Natzle, Wesley, Dynamic metrology sampling with wafer uniformity control.
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  19. Choi, Dongwon; Lee, Dong Hyung; Poon, Tze; Vellaikal, Manoj; Porshnev, Peter; Foad, Majeed, Enhanced scavenging of residual fluorine radicals using silicon coating on process chamber walls.
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  20. Ahn, Kie Y.; Forbes, Leonard, Gallium lanthanide oxide films.
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  21. Ahn, Kie Y.; Forbes, Leonard, Gallium lanthanide oxide films.
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  22. Ahn, Kie Y.; Forbes, Leonard, Gallium lathanide oxide films.
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  23. Katz, Dan; Buchberger, Jr., Douglas A.; Ye, Yan; Hagen, Robert B.; Zhao, Xiaoye; Kumar, Ananda H.; Chiang, Kang-Lie; Noorbakhsh, Hamid; Wang, Shiang-Bau, Gas distribution plate electrode for a plasma reactor.
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  24. Katz, Dan; Buchberger, Jr., Douglas A.; Ye, Yan; Hagen, Robert B.; Zhao, Xiaoye; Kumar, Ananda H.; Chiang, Kang-Lie; Noorbakhsh, Hamid; Wang, Shiang-Bau, Gas distribution plate electrode for a plasma receptor.
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  25. Ahn, Kie Y.; Forbes, Leonard, Hafnium tantalum oxide dielectrics.
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  26. Ahn, Kie Y.; Forbes, Leonard, Hafnium tantalum oxide dielectrics.
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  27. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Hafnium tantalum oxynitride dielectric.
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  28. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Hafnium tantalum oxynitride dielectric.
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  29. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Hafnium tantalum oxynitride high-k dielectric and metal gates.
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  30. Ahn, Kie Y.; Forbes, Leonard, Lanthanide doped TiOx films.
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  31. Ahn,Kie Y.; Forbes,Leonard, Lanthanum hafnium oxide dielectrics.
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  32. Ahn,Kie Y.; Forbes,Leonard, Lanthanum hafnium oxide dielectrics.
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  33. Tokuhisa, Yasukazu; Gotoh, Takao; Matsuoka, Tohru; Suzuki, Shigehiro, Mass flow rate-controlling apparatus.
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  34. Enicks,Darwin Gene, Method and system for controlled oxygen incorporation in compound semiconductor films for device performance enhancement.
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  35. Ahn, Kie Y.; Forbes, Leonard, Method of fabricating an apparatus having a lanthanum-metal oxide dielectric layer.
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  36. Ahn, Kie Y.; Forbes, Leonard, Method of forming an apparatus having a dielectric containing cerium oxide and aluminum oxide.
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  37. Yamane, Chigusa, Method of producing semiconductor device.
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  38. Ahn, Kie Y.; Forbes, Leonard, Methods for atomic-layer deposition.
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  39. Ahn,Kie Y.; Forbes,Leonard, Methods for forming a lanthanum-metal oxide dielectric layer.
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  40. Ahn,Kie Y., Methods, systems, and apparatus for uniform chemical-vapor depositions.
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  41. Ahn, Kie Y.; Forbes, Leonard, Nanolaminates of hafnium oxide and zirconium oxide.
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  42. Mercaldi, Garry Anthony; Powell, Don Carl, Process for fabricating films of uniform properties on semiconductor devices.
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  43. Mercaldi, Garry Anthony; Powell, Don Carl, Process for fabricating films of uniform properties on semiconductor devices.
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  44. Mercaldi, Garry Anthony; Powell, Don Carl, Process for fabricating films of uniform properties on semiconductor devices.
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  45. Mercaldi, Garry Anthony; Powell, Don Carl, Process for fabricating films of uniform properties on semiconductor devices.
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  46. Mercaldi,Garry Anthony; Powell,Don Carl, Process for fabricating films of uniform properties on semiconductor devices.
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  47. Tsai,Chao Tzung; Wang,Ling Sung; Yen,Ching Lang, Retrograde trench isolation structures.
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  48. Ahn, Kie Y.; Forbes, Leonard, Ruthenium for a dielectric containing a lanthanide.
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  49. Ahn, Kie Y.; Forbes, Leonard, Ruthenium for a dielectric containing a lanthanide.
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  50. Ahn, Kie Y.; Forbes, Leonard, Ruthenium layer for a dielectric layer containing a lanthanide oxide.
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  51. Fagan, John L.; Bossard, Mark, Selectable delay pulse generator.
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  52. Liaw, Jhon-Jhy; Chen, Chao-Cheng; Chang, Chia-Wei, Shallow trench isolation with improved structure and method of forming.
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  53. Liaw, Jhon-Jhy; Chen, Chao-Cheng; Chang, Chia-Wei, Shallow trench isolation with improved structure and method of forming.
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  54. Yang, Il-Kwang; Song, Byoung-Gyu; Kim, Yong-Ki; Kim, Kyong-Hun; Shin, Yang-Sik, Showerhead having cooling system and substrate processing apparatus including the showerhead.
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  55. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Tantalum aluminum oxynitride high-K dielectric.
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  56. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Tantalum aluminum oxynitride high-κ dielectric.
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  57. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Tantalum silicon oxynitride high-K dielectrics and metal gates.
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  58. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Tantalum silicon oxynitride high-K dielectrics and metal gates.
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  59. Forbes, Leonard; Ahn, Kie Y.; Bhattacharyya, Arup, Tantalum silicon oxynitride high-k dielectrics and metal gates.
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  60. Blake, Julian; England, Jonathan; Holden, Scott; Walther, Steven R.; Liebert, Reuel; Muka, Richard S.; Jeong, Ukyo; Liu, Jinning; Shim, Kyu-Ha; Mehta, Sandeep, Techniques for temperature controlled ion implantation.
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  61. Enicks,Darwin G., Very low moisture o-ring and method for preparing the same.
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  62. Jan,Chin Tsan, Wafer protection system.
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