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[미국특허] Dynamic resource allocation for user management in multi-processor time shared computer systems 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-015/173
출원번호 US-0030432 (1998-02-25)
발명자 / 주소
  • Jerome M. Kurtzberg
  • Menachem Levanoni
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    Stephen C. Kaufman, Esq.
인용정보 피인용 횟수 : 60  인용 특허 : 15

초록 ▼

A method suitable for optimizing allocation of resources, in support of k users, in a multi-processor time-shared computer system. The method includes the steps of inputting data comprising current job requirements; operating upon the current job requirements for determining required resources; stor

대표청구항 ▼

1. An assembly suitable for optimizing allocation of resources, in support of k users, in a multi processor time-shared computer system, said assembly comprising:a resource monitor comprising: an input device for inputting job requirement data for a plurality of jobs; a device for deter required res

이 특허에 인용된 특허 (15) 인용/피인용 타임라인 분석

  1. Akizawa Mitsuru (Hachioji JPX) Yamashita Hirofumi (Yokohama JPX) Kawaguchi Hisamitsu (Sagamihara JPX) Tada Katsumi (Yokohama JPX) Kato Kanji (Yokohama JPX) Kito Akira (Ebina JPX) Yamada Hidenori (Had, File server system and file access control method of the same.
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  2. DeRosa ; Jr. John Anthony ; Schreiber Benn Lee ; Hayden Peter Chapman ; Apgar Scott Wade, Method and apparatus for configuring a computer system.
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  3. Dahlen Dennis James ; Elko David Arlen ; Helffrich Audrey Ann ; King Richard Pervin ; Nick Jeffrey Mark ; Palmer Stewart Laundon ; Wilkinson Wendell Wiley, Method and apparatus for expansion, contraction, and reapportionment of structured external storage structures.
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  4. Delp Gary Scott ; Guerin Roch A. ; Leichty Philip Lynn ; Peris Vinod Gerard John ; Rajan Rajendran ; Slane Albert Alfonse, Method and apparatus for resource allocation with guarantees.
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  5. Greenstein Paul Gregory ; Rodell John Ted ; Wright Michael Allen, Method and system for providing service processor capability in a data processing by transmitting service processor req.
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  6. Wright Andrew S.,CAX ; Newton Helen R.,CAX ; Mansfield Carl, Methods for resource control in a non-unitary service system.
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  7. Inakoshi Hiroya,JPX, Network resource monitoring system and method for providing notice of changes in resources in a network.
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  8. Walker Paul,GBX ; Laithwaite Robert N. W.,GBX ; Denman John,GBX ; Morton David,GBX ; Williams Gerwyn L.,GBX ; Jubb Mike,GBX ; Taylor Alan,GBX, Resource allocation.
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  9. Miller Harold R. (Richard Hill CAX), Resource allocation methods.
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  10. Scobee John D. (St. Louis MO), Simplified uniform network provisioning and restoration.
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  11. Culbert Daniel, System and method for dynamic resource management across tasks in real-time operating systems.
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  12. Baker Brenda Sue (Berkeley Heights NJ) Grosse Eric (Berkeley Heights NJ), System and method for restricting user access rights on the internet based on rating information stored in a relational.
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  13. Eilert Catherine Krueger ; Yocom Peter Bergersen, System for managing processor resources in a multisystem environment in order to provide smooth real-time data streams w.
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  14. Shachar Yuval,ILX, System using machine-readable printed symbols created from encoded data resource specifiers to establish connection to data resource on data communications network.
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  15. Broder Andrei ; Mitzenmacher Michael, Task processing optimization in a multiprocessor system.
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이 특허를 인용한 특허 (60) 인용/피인용 타임라인 분석

  1. Ramchandran, Amit, Adaptable datapath for a digital processing system.
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  2. Ramchandran, Amit, Adaptable datapath for a digital processing system.
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  3. Ramchandran, Amit, Adaptable datapath for a digital processing system.
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  4. Ramchandran, Amit, Adaptable datapath for a digital processing system.
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  5. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter J., Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
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  6. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter J., Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
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  7. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
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  8. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive integrated circuitry with heterogenous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
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  9. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive processor for performing an operation with simple and complex units each comprising configurably interconnected heterogeneous elements.
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  10. Master, Paul L.; Uvacek, Bohumir, Apparatus and method for adaptive multimedia reception and transmission in communication environments.
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  11. Zhou, Zhiyuan, Apparatus, device and method for allocating CPU resources.
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  12. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
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  13. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
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  14. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
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  15. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, system and method for configuration of adaptive integrated circuitry having fixed, application specific computational elements.
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  16. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements.
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  17. Shively, II, Darrell Myers; Knight, John; Patil, Kavita Shekhar; Boyd, Pauline Chen; Bui, Sonny; Roden, Thomas Anthony, Automatic hardware failure detection and recovery for distributed max sessions server.
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  18. Shively, II,Darrell Myers; Knight,John; Patil,Kavita Shekhar; Boyd,Pauline Chen; Bui,Sonny; Roden,Thomas Anthony, Automatic hardware failure detection and recovery for distributed max sessions server.
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  19. Doyle,Ronald P.; Kaminsky,David Louis, Autonomic service routing using observed resource requirement for self-optimization.
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  20. Bridger,Jacob; Netzer,Arnon; Gavish,Amnon, Channel load balancing.
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  21. Heidari, Ghobad; Chang, Kuor Hsin; Master, Paul L.; Hogenauer, Eugene B.; Scheuermann, Walter James, Communications module, device, and method for implementing a system acquisition function.
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  22. Master, Paul L.; Watson, John, Configurable hardware based digital imaging apparatus.
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  23. Scheuermann, W. James; Hogenauer, Eugene B., Control node for multi-core system.
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  24. Clarisse, Olivier Bernard Henri; Westergren, Bruce A., Distributed network application management system.
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  25. Damschroder, James Eric; Ladd, Josh Samuel, Diversification measurement and analysis system.
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  26. Furtek, Frederick Curtis; Master, Paul L., External memory controller.
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  27. Furtek, Frederick Curtis; Master, Paul L., External memory controller node.
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  28. Furtek, Fredrick Curtis; Master, Paul L., External memory controller node.
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  29. Furtek, Fredrick Curtis; Master, Paul L., External memory controller node.
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  30. Scheuermann,Walter James, Hardware implementation of the secure hash standard.
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  31. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
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  32. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
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  33. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
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  34. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
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  35. Sambhwani, Sharad; Heidari, Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
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  36. Sambhwani, Sharad; Heidari, Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
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  37. Sambhwani,Sharad; Heidari,Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
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  38. Damschroder,James Eric, Method and apparatus for creating and managing a visual representation of a portfolio and determining an efficient allocation.
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  39. Master, Paul L., Method and system for achieving individualized protected space in an operating system.
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  40. Master, Paul L., Method and system for creating and programming an adaptive computing engine.
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  41. Combs, Charles; Gold, Jeffrey; Mair, Brian; Pedersen, David; Schear, David, Method and system for maintenance of global network information in a distributed network-based resource allocation system.
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  42. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
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  43. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
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  45. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
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  46. Scheuermann, W. James, Method and system for reconfigurable channel coding.
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  50. Master,Paul L.; Hogenauer,Eugene; Wu,Bicheng William; Chuang,Dan MingLun; Freeman Benson,Bjorn, Method, system and program for developing and scheduling adaptive integrated circuity and corresponding control or configuration information.
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  51. Obrecht, Mark E.; Myers, Robert P.; Hartmann, Alfred C.; Alagna, Nick F.; Pyle, Kevin N.; Sullivan, Scott D.; Little, Michael W., Monitoring computer process resource usage.
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  53. Cupps,Bryan T.; Glass,Timothy J., Personal electronics device with a dual core processor.
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  54. Master, Paul L., Profiling of software and circuit designs utilizing data operation analyses.
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  55. Murray, Paul; Goldsack, Patrick; Guijarro, Julio Ceasr, Provision of resource allocation information.
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  56. Master,Paul L.; Watson,John, Storage and delivery of device features.
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  57. Master, Paul L.; Watson, John, System for adapting device standards after manufacture.
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  58. Master, Paul L.; Watson, John, System for authorizing functionality in adaptable hardware devices.
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  59. Allen, Joshua S., System, method and program product for maintaining session information during dynamic resource additions or updates.
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  60. Katragadda, Ramana; Spoltore, Paul; Howard, Ric, Task definition for specifying resource requirements.
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