초록 ▼

An electronic package, and method of making the electronic package, is provided. The package includes a semiconductor chip and an multi-layered interconnect structure having a high density interconnect layer such as an allylated surface layer. The semiconductor chip includes a plurality of contact m

An electronic package, and method of making the electronic package, is provided. The package includes a semiconductor chip and an multi-layered interconnect structure having a high density interconnect layer such as an allylated surface layer. The semiconductor chip includes a plurality of contact members on one of its surfaces that are connected to the multi-layered interconnect structure by a plurality of solder connections. The multi-layered interconnect structure is adapted for electrically interconnecting the semiconductor chip to a circuitized substrate (eg., circuit board) with another plurality of solder connections and includes a thermally conductive layer being comprised of a material having a selected thickness and coefficient of thermal expansion to substantially prevent failure of the solder connections between said first plurality of electrically conductive members and the semiconductor chip. The electronic package further includes a dielectric material having an effective modulus to assure sufficient compliancy of the multi-layered interconnect structure during operation. The allylated surface layer has the property of being able to withstand thermal stresses that arise during thermal cycling operation of the electronic package.

대표청구항 ▼

1. A multi-layered interconnect structure, comprising:a thermally conductive layer including first and second opposing surfaces; a first and a second dielectric layer positioned on the first and the second opposing surfaces, respectively, of the thermally conductive layer; first and second pluraliti

1. A multi-layered interconnect structure, comprising:a thermally conductive layer including first and second opposing surfaces; a first and a second dielectric layer positioned on the first and the second opposing surfaces, respectively, of the thermally conductive layer; first and second pluralities of electrically conductive members positioned on said first and second dielectric layers, respectively; a first electrically conductive layer within said first dielectric layer; a second electrically conductive layer within said first dielectric layer and positioned between said first electrically conductive layer and said thermally conductive layer, wherein said second electrically conductive layer comprises a first plurality of shielded signal conductors; a plated through hole through the multi-layered interconnect structure electrically connected to at least one member of said first plurality of electrically conductive members, to at least one of said first plurality of shielded signal conductors, and to at least one member of said second plurality of electrically conductive members; and a third dielectric layer positioned on said first dielectric layer and on portions of said first plurality of electrically conductive members, said third dielectric layer substantially overlying said plated through hole, and wherein said third dielectric layer includes a first high density interconnect layer for providing an electrical path from a first electronic device to the first plurality of shielded signal conductors.