초록 ▼

A method and apparatus for increasing the voltage resolution of a PWM controller wherein the controller controls pulse width as a function of a PWM register count having a maximum count X where 1 part in X affords insufficient resolution, the method including receiving a high resolution voltage requ

A method and apparatus for increasing the voltage resolution of a PWM controller wherein the controller controls pulse width as a function of a PWM register count having a maximum count X where 1 part in X affords insufficient resolution, the method including receiving a high resolution voltage request count from within the range 0 through count Y where the voltage corresponding to count Y is equal to the voltage corresponding to count X and where count Y is greater than count X, the method including dividing the request signal by a divisor (Y/X) to generate an output value and a remainder, identifying a pseudo-random number within the range of possible remainder values, comparing the pseudo-random number to the remainder, where the pseudo-random number is less than the remainder, incrementing the output value, providing the output value to the PWM register as the register count and repeating the aforementioned steps.

대표청구항 ▼

1. A method for use with a PWM controller that controls coil voltage within a voltage range by regulating voltage pulse widths across the coil using a PWM counter register having a register range between 0 and X and wherein 1 part in X resolution is insufficient to provide required resolution, the m

1. A method for use with a PWM controller that controls coil voltage within a voltage range by regulating voltage pulse widths across the coil using a PWM counter register having a register range between 0 and X and wherein 1 part in X resolution is insufficient to provide required resolution, the method for increasing output resolution and comprising the steps of;(a) receiving a high resolution voltage magnitude request signal S corresponding to a request voltage within the voltage range, the signal S having a resolution greater than 1 part in X; (b) identifying first and second consecutive counts between 0 and X corresponding to lower and upper voltage levels below and above the request voltage; (c) over the course of D PWM cycles, randomly selecting between the first and second counts such that the ratio of second to first counts over the D cycles is essentially equal to the difference between the request voltage and the lower voltage divided by the difference between the upper voltage and the lower voltage; and (d) providing the selected counts as the counter register counts.