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Disclosed is a method of producing a flexible circuit board having gold selectively plated on only desired elements of the conductive circuits. These desired elements typically are attachment sites, such as wire bond pads or ball grid array pads, for semiconductor chips. This method eliminates the r

Disclosed is a method of producing a flexible circuit board having gold selectively plated on only desired elements of the conductive circuits. These desired elements typically are attachment sites, such as wire bond pads or ball grid array pads, for semiconductor chips. This method eliminates the requirement to buss all circuits to a common plating contact by using a background seed metal for plating continuity. This method also provides a means to alleviate the requirement for precise registration or alignment when multiple photoresist layers are employed in order to selectively plate only a portion of the metallic elements present on the flexible circuit board. The defect of resist lifting followed by nickel/gold underplating is eliminated by conditioning the intermediate photoresist to survive the nickel/gold plating bath.

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1. A process to manufacture noble metal plated lands on a microelectronic printed wiring substrate without the use of a commoning bar or bus circuitry, the process steps comprising:a) providing at least one dielectric substrate, said substrate comprising at least one major lateral surface, b) provid

1. A process to manufacture noble metal plated lands on a microelectronic printed wiring substrate without the use of a commoning bar or bus circuitry, the process steps comprising:a) providing at least one dielectric substrate, said substrate comprising at least one major lateral surface, b) providing a seed layer to said major lateral surface of said substrate, said seed layer having sufficient electrical conductivity to allow electrolytic precious metal overplating of later-formed nascent metal elements from step (d) without the need for a commoning bar or bus circuitry thus forming noble metal plated lands; c) applying a first negative working photoresist to said seed layer and subsequently imaging and developing said first negative working photoresist to uncover regions of said seed layer; d) plating a conductive metal onto said uncovered regions to essentially the height of said first negative photoresist upper surface in order to provide nascent metal elements having a topmost surface with predetermined cross-section dimensions; e) applying a second photoresist to essentially cover said developed first photoresist and said nascent metal elements; and f) imaging and developing said second photoresist to create openings which uncover said topmost surface of at least one of said nascent metal elements, said uncovered nascent metal elements comprising nascent lands, said openings being larger in all cross-section dimensions than said cross-section dimensions of said topmost surface of nascent lands.