초록 ▼

An apparatus for controlling a cache in a computing node, which is located between a node bus and an interconnection network to perform a cache coherence protocol, includes: a node bus interface for interfacing with the node bus; an interconnection network interface for interfacing with the intercon

An apparatus for controlling a cache in a computing node, which is located between a node bus and an interconnection network to perform a cache coherence protocol, includes: a node bus interface for interfacing with the node bus; an interconnection network interface for interfacing with the interconnection network; a cache control logic means for controlling the cache to perform the cache coherence protocol; bus-side dual-port transaction buffers coupled between said node bus interface and said cache control logic means for buffering transaction requested and replied from or to local processors contained in the computing node; and network-side dual-port transaction buffers coupled between said interconnection network interface and said cache control logic for buffering transaction requested and replied from or to remote processors contained in another computing node coupled to the interconnection network.

대표청구항 ▼

1. An apparatus for controlling a cache in a computing node, which is located between a node bus and an interconnection network to perform a cache coherence protocol, comprising:a node bus interface means for interfacing with the node bus; an interconnection network interface means for interfacing w

1. An apparatus for controlling a cache in a computing node, which is located between a node bus and an interconnection network to perform a cache coherence protocol, comprising:a node bus interface means for interfacing with the node bus; an interconnection network interface means for interfacing with the interconnection network; a cache control logic means for controlling the cache to perform the cache coherence protocol; a plurality of first dual-port transaction buffering means coupled between said node bus interface means and said cache control logic means for buffering transactions requested and replied from or to local processors contained in the computing node; and a plurality of second dual-port transaction buffering means coupled between said interconnection network interface means and said cache control logic means for buffering transactions requested and replied from or to remote processors contained in another computing node coupled to the interconnection network.