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Process for forming a silicon-germanium base of a heterojunction bipolar transistor 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/331
출원번호 US-0867373 (2001-05-29)
발명자 / 주소
  • Feng-Yi Huang
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    Ratner & Prestia
인용정보 피인용 횟수 : 27  인용 특허 : 13

초록

A process for forming a silicon-germanium base of a heterojunction bipolar transistor. First, a silicon substrate having a mesa surrounded by a trench is formed. Next, a silicon-germanium layer is deposited on the substrate and the portion of the silicon-germanium layer adjacent the mesa is removed

대표청구항

1. A process for forming a silicon-germanium base of a heterojunction bipolar transistor, said process comprising the steps of:forming a silicon substrate having a mesa surrounded by a trench, said mesa having a top surface; forming a dielectric layer in said trench adjacent said mesa; and growing a

이 특허에 인용된 특허 (13)

  1. Jambotkar Chakrapani G. (Hopewell Junction NY), Bipolar transistor integrated circuit technology.
  2. Laderman Stephen (Menlo Park CA) Scott Martin (San Francisco CA) Kamins Theodore I. (Palo Alto CA) Hoyt Judy L. (Palo Alto CA) King Clifford A. (Palo Alto CA) Gibbons James F. (Palo Alto CA) Noble Da, Fabricating a semiconductor device with strained Si1-xGex layer.
  3. Morizuka Kouhei (Yokohama JPX), Heterojunction bipolar transistor with base electrode having Schottky barrier contact to the emitter.
  4. Imai Kiyotaka (Tokyo JPX), Heterojunction bipolar transistor with silicon-germanium base.
  5. Kato Hirosi (Tokyo JPX), Method for fabricating a bipolar transistor with a base layer having an extremely low resistance.
  6. Herbert Francois ; Bashir Rashid, Method for forming a self-aligned bipolar junction transistor with silicide extrinsic base contacts and selective epita.
  7. Streit Dwight Christopher (Seal Beach CA) Lammert Michael (Manhattan Beach CA) Oki Aaron Kenji (Torrance CA), Method for making selective subcollector heterojunction bipolar transistors.
  8. Hamasaki Toshihiko (Yokohama JPX) Satake Hideki (Kawasaki JPX), Method of fabricating a miniaturized heterojunction bipolar transistor.
  9. Mohammad S. Noor (Hopewell Junction NY), Method of fabricating a triple heterojunction bipolar transistor.
  10. Boles Timothy Edward, Method of fabricating polysilicon based resistors in Si-Ge heterojunction devices.
  11. Taka Shin-ichi (Yokosuka JPX) Kimura Kouji (Kawasaki JPX) Naruse Hiroshi (Kawasaki JPX) Kumamaru Kuniaki (Yokohama JPX), Method of manufacturing a hetero bipolar transistor.
  12. Huang Feng-Yi, Process for forming a silicon-germanium base of heterojunction bipolar transistor.
  13. Imai Kiyotaka (Tokyo JPX), Process of producing heterojunction bipolar transistor with silicon-germanium base.

이 특허를 인용한 특허 (27)

  1. Enicks, Darwin Gene; Carver, Damian, Bandgap and recombination engineered emitter layers for SiGe HBT performance optimization.
  2. Vieira,Amarildo J. C.; Barenburg,Barbara F.; Brophy,Timothy J., Fabrication of a wavelength locker within a semiconductor structure.
  3. Liang, Yong; Droopad, Ravindranath; Li, Hao; Yu, Zhiyi, Ferromagnetic semiconductor structure and method for forming the same.
  4. Droopad, Ravindranath, Growth of compound semiconductor structures on patterned oxide films and process for fabricating same.
  5. El Zein,Nada; Ramdani,Jamal; Eisenbeiser,Kurt; Droopad,Ravindranath, Heterojunction tunneling diodes and process for fabricating same.
  6. Ooms,William J.; Hallmark,Jerald A., Method and apparatus utilizing monocrystalline insulator.
  7. Enicks,Darwin Gene, Method and system for controlled oxygen incorporation in compound semiconductor films for device performance enhancement.
  8. Ramdani, Jamal; Droopad, Ravindranath; Yu, Zhiyi, Method for fabricating a semiconductor structure including a metal oxide interface with silicon.
  9. Liang,Yong; Droopad,Ravindranath; Hu,Xiaoming; Wang,Jun; Wei,Yi; Yu,Zhiyi, Method for fabricating semiconductor structures on vicinal substrates using a low temperature, low pressure, alkaline earth metal-rich process.
  10. Li, Hao; Droopad, Ravindranath; Marshall, Daniel S.; Wei, Yi; Hu, Xiao M.; Liang, Yong, Method for growing a monocrystalline oxide layer and for fabricating a semiconductor device on a monocrystalline substrate.
  11. Gorrell, Jonathan F.; Cornett, Kenneth D., Method for manufacturing a substantially integral monolithic apparatus including a plurality of semiconductor materials.
  12. Yu, Zhiyi; Droopad, Ravindranath; Overgaard, Corey, Method for real-time monitoring and controlling perovskite oxide film growth and semiconductor structure formed using the method.
  13. Edwards, Jr., John L.; Wei, Yi; Jordan, Dirk C.; Hu, Xiaoming; Craigo, James Bradley; Droopad, Ravindranath; Yu, Zhiyi; Demkov, Alexander A., Method of removing an amorphous oxide from a monocrystalline surface.
  14. Talin,Albert Alec; Voight,Steven A., Optical waveguide structure and method for fabricating the same.
  15. Eisenbeiser,Kurt; Wang,Jun; Droopad,Ravindranath, Semiconductor device and method.
  16. Yu,Zhiyi; Droopad,Ravindranath, Semiconductor structure exhibiting reduced leakage current and method of fabricating same.
  17. Eisenbeiser, Kurt; Foley, Barbara M.; Finder, Jeffrey M.; Thompson, Danny L., Semiconductor structure including a partially annealed layer and method of forming the same.
  18. Ramdani,Jamal; Droopad,Ravindranath; Hilt,Lyndee L.; Eisenbeiser,Kurt Williamson, Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same.
  19. Rim, Kern, Strained silicon on insulator structures.
  20. Ramdani,Jamal; Hilt,Lyndee L., Structure and method for fabricating GaN devices utilizing the formation of a compliant substrate.
  21. Emrick, Rudy M.; Bosco, Bruce Allen; Holmes, John E.; Franson, Steven James; Rockwell, Stephen Kent, Structure and method for fabricating configurable transistor devices utilizing the formation of a compliant substrate for materials used to form the same.
  22. Eisenbeiser, Kurt W.; Yu, Zhiyi; Droopad, Ravindranath, Structure and method for fabricating epitaxial semiconductor on insulator (SOI) structures and devices utilizing the formation of a compliant substrate for materials used to form same.
  23. Holm, Paige M.; Barenburg, Barbara Foley; Yamamoto, Joyce K.; Richard, Fred V., Structure and method for fabricating semiconductor microresonator devices.
  24. Lempkowski,Robert; Chason,Marc, Structure and method for fabricating semiconductor structures and devices for detecting an object.
  25. Tungare,Aroon; Klosowiak,Tomasz L., Structure and method for fabricating semiconductor structures and devices utilizing piezoelectric materials.
  26. Valliath, George, Structure and method for fabrication for a solid-state lighting device.
  27. Emrick, Rudy M.; Rockwell, Stephen Kent; Holmes, John E., Structure for fabricating high electron mobility transistors utilizing the formation of complaint substrates.

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