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Multi-level spiral inductor structure having high inductance (L) and high quality factor (Q) 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/00
출원번호 US-0679092 (2000-10-04)
발명자 / 주소
  • Ping Liou TW
출원인 / 주소
  • Winbond Electronics Corp. TW
대리인 / 주소
    Niro, Scavone, Haller & Niro
인용정보 피인용 횟수 : 34  인용 특허 : 5

초록

A high inductance and high-Q inductor structure formed using multilevel interconnect technology with deep trench has the same current flow direction in each spiral coil pattern. The inductor uses reflection and rotation transformation to generate each spiral coil pattern and neighboring spiral coil

대표청구항

1. A high inductance and high-Q monolithic inductor structure for RF application fabricated by using a multilevel interconnect technology of m conducting levels, wherein m is a nature number larger than 4, comprising:a first insulator formed on a substrate of said inductor structure; a first metal l

이 특허에 인용된 특허 (5)

  1. Ewen John E. (Yorktown Heights NY) Ponnapalli Saila (Fishkill NY) Soyuer Mehmet (Yorktown Heights NY), High-Q inductors in silicon technology without expensive metalization.
  2. Merrill Richard B. (Daly City CA) Issaq Enayet U. (San Jose CA), Multi-turn, multi-level IC inductor with crossovers.
  3. Mizoguchi Tetsuhiko,JPX ; Sato Toshiro,JPX ; Sahashi Masashi,JPX ; Hasegawa Michio,JPX ; Tomita Hiroshi,JPX ; Sawabe Atsuhito,JPX, Planar magnetic element.
  4. Jou Chewnpu,TWX, Semiconductor inductor.
  5. Burghartz Joachim Norbert (Shrub Oak NY) Jenkins Keith Aelwyn (Tarrytown NY) Ponnapalli Saila (Fishkill NY) Soyuer Mehmet (Yorktown Heights NY), Two-level spiral inductor structure having a high inductance to area ratio.

이 특허를 인용한 특허 (34)

  1. Lin, Mou-Shiung; Lee, Jin-Yuan, Chip packages having dual DMOS devices with power management integrated circuits.
  2. Lin, Mou-Shiung, Chip structure with a passive device and method for forming the same.
  3. Findley, Paul; Tao, Jon; Rezvani, Gholam-Ali, Differential inductor design for high self-resonance frequency.
  4. Oh, Sung-Taeg; Park, Tae-Young, Field coil assembly of electromagnetic clutch for compressor and method for manufacturing the same.
  5. Korony, Gheorghe; Heistand, II, Robert H., High Q planar inductors and IPD applications.
  6. Lin, Mou-Shiung, High performance system-on-chip inductor using post passivation process.
  7. Lin, Mou-Shing, High performance system-on-chip using post passivation process.
  8. Lin, Mou-Shiung, High performance system-on-chip using post passivation process.
  9. Lin,Mou Shiung, High performance system-on-chip using post passivation process.
  10. Lin,Mou Shiung, High performance system-on-chip using post passivation process.
  11. Kuroda, Tadahiro, Inductor element, integrated circuit device, and three-dimensional circuit device.
  12. Wang, Sung-Hsiung; Chao, Chih-Ping; Su, Chia-Yu, Inductor utilizing pad metal layer.
  13. Tamata,Mitsuru; Hamaguchi,Mutsumi, Inductor, resonant circuit, semiconductor integrated circuit, oscillator, and communication apparatus.
  14. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
  15. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
  16. Findley, Paul; Tao, Jon; Rezvani, Gholam-Ali, Method of constructing a differential inductor.
  17. Harris,Edward B.; Downey,Stephen W., Method of forming a spiral inductor in a semiconductor substrate.
  18. Chaudhry, Samir; Layman, Paul Arthur; Thomson, J. Ross; Laradji, Mohamed; Griglione, Michelle D., Multi-layer inductor formed in a semiconductor substrate.
  19. Kyriazidou,Sissy; Contopanagos,Harry; Rofougaran,Reza, On-chip high Q inductor.
  20. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection process and structures.
  21. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection structures.
  22. Aoki,Yutaka, Semiconductor device.
  23. Ahn,Kie Y.; Forbes,Leonard, Semiconductor device with electrically coupled spiral inductors.
  24. Tsukahara, Yoshihiro; Ishida, Takao, Semiconductor device with inductor having interleaved windings for controlling capacitance.
  25. Harris,Edward B.; Downey,Stephen W., Spiral inductor formed in a semiconductor substrate.
  26. Parthasarathy, Shyam; Vanukuru, Venkata Narayana Rao; Wolf, Randy Lee, Structure and method for high performance multi-port inductor.
  27. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  28. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  29. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  30. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  31. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  32. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  33. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  34. Lin, Mou-Shiung; Wei, Gu-Yeon, Voltage regulator integrated with semiconductor chip.
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