[특허]System management mode circuits, systems and methods

[미국특허] System management mode circuits, systems and methods 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	G06F-013/24 G06F-013/00
출원번호	US-0480179 (1995-06-07)
발명자 / 주소	Weiyuen Kau John H. Cornish Qadeer A. Qureshi Shannon A. Wichman
출원인 / 주소	Texas Instruments Incorporated
대리인 / 주소	Dana L. Burton
인용정보	피인용 횟수 : 130 인용 특허 : 9

초록 ▼

An electronic system (100) includes a first integrated circuit (IC) (112) having a card system management interrupt (SMI) output pin (CRDSMI # ) and interrupt pins (IRQ3-5), and a logic circuit (1620, 1630) having an output connected to the card SMI pin. This logic circuit further has inputs connected to a first and second set of registers and logic for first and second cards (CARD A,B) respectively. Each of the first and second sets of registers and logic include a first register (CSC REG) having bits set by at least a card event (CDCHG) and a battery condition event (BWARN) respectively. A logic gate (2672) responds to combine the bits from the first register. A second register (INT AND GEN CTRL REG) has a bit (SMIEN) for steering the output of the logic gate (2672) for ordinary interrupt or for system management interrupt purposes depending on the state of the bit (SMIEN). A second integrated circuit (110) has a system management interrupt (SMI # ) output pin and SMI circuitry (2370) including a SMI register (2610) connected to events sources eligible for SMI response including the card SMI output of the first integrated circuit. This second IC (110) further has a mask SMI register (2620) connected to the SMI register (2610) to select particular ones of the events sources for SMI response. A logic circuit (2634, 2638) is fed by the SMI register (2610) for combining the selected events sources to supply an internal SMI output (SMIOUT). Other circuits, systems and methods are also disclosed.

대표청구항 ▼

1. An electronic wiring board article of manufacture comprising:a printed wiring board having a substantially insulative planar board element, conductors in or on said board element; a first integrated circuit mounted on said printed wiring board; a second integrated circuit mounted on said printed wiring board and coupled to said first integrated circuit comprising: a card system management interrupt (SMI) output pin, interrupt pins, and circuitry having an output coupled to said card SMI output pin, said circuitry comprising: an interface couplable to at least one card; a first circuit coupled to receive and responsive to combine a plurality of first bits set by one or more events received at said interface; steering circuitry responsive to at least one second bit for steering the output of said first circuit for ordinary interrupt or for system management interrupt purposes depending on the state of said at least one second bit; and said conductors of said printed wiring board providing connection between said first integrated circuit and said second integrated circuit.

이 특허에 인용된 특허 (9) 인용/피인용 타임라인 분석

Kardach James (San Jose CA) Mathews Gregory (Cupertino CA) Nguyen Cau (Milpitas CA) Cho Sung S. (Sunnyvale CA) Sivamani Kameswaran (Sunnyvale CA) Vannier David (Cupertino CA) Wong Shing (Cupertino CA, Computer system with interrupts transparent to its operating system and application programs.
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Gettel Steven K. (Austin TX), Computer with transparent power-saving manipulation of CPU clock.
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Shu Thomas (Austin TX), Docking detection and suspend circuit for portable computer/expansion chassis docking system.
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Gulick Dale E. (Austin TX) Peterson Joe W. (Austin TX) Yoshikawa Munehiro (Tokyo JPX) Matsubara Hiroshi (Tokyo JPX) Fujita Toshihiro (Tokyo JPX) Tsurumi Kazushige (Tokyo JPX), General I/O port interrupt mechanism.
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Kardach James (San Jose CA) Cho Sung S. (Sunnyvale CA) Peterson Nicholas B. (San Jose CA) Lane Thomas R. (San Jose CA), Method and apparatus for interrupt signaling in a computer system.
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Shah Nilesh V. (Folsom CA) Rabe Jeffrey L. (Rancho Cordova CA) Bogin Zohar (Folsom CA), Method and apparatus for interrupt/SMI#ordering.
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Belmont Brian V. (Houston TX), Portable computer system for docking to an expansion base unit.
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Klim Peter J. (Deerfield Beach FL) Lyford Avery M. (Boca Raton FL) Moeller Dennis L. (Delray Beach FL), Programable interrupt controller.
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Kardach James (San Jose CA) Mathews Gregory (Cupertino CA) Nguyen Cau (Milpitas CA) Cho Sung S. (Sunnyvale CA) Sivamani Kameswaran (Sunnyvale CA) Vannier David (Cupertino CA) Wong Shing (Cupertino CA, Transparent system interrupt.
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해당 특허가 속한 카테고리에서 활용도가 높은 상위 5개 콘텐츠를 보여줍니다.
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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

내보내기 구분	파일저장 인쇄 메일전송
구성항목	기본정보 상세정보 관리번호, 국가코드, 자료구분, 상태, 출원번호, 출원일자, 공개번호, 공개일자, 등록번호, 등록일자, 발명명칭(한글), 발명명칭(영문), 출원인(한글), 출원인(영문), 출원인코드, 대표IPC 관리번호, 국가코드, 자료구분, 상태, 출원번호, 출원일자, 공개번호, 공개일자, 공고번호, 공고일자, 등록번호, 등록일자, 발명명칭(한글), 발명명칭(영문), 출원인(한글), 출원인(영문), 출원인코드, 대표출원인, 출원인국적, 출원인주소, 발명자, 발명자E, 발명자코드, 발명자주소, 발명자 우편번호, 발명자국적, 대표IPC, IPC코드, 요약, 미국특허분류, 대리인주소, 대리인코드, 대리인(한글), 대리인(영문), 국제공개일자, 국제공개번호, 국제출원일자, 국제출원번호, 우선권, 우선권주장일, 우선권국가, 우선권출원번호, 원출원일자, 원출원번호, 지정국, Citing Patents, Cited Patents
저장형식	Text(ASCII format) Excel format PIAS분석(.xls)
메일정보	받는사람 (필수) @ 보내는사람 (선택) @ 제목 내용 KISTI 검색결과 이메일 서비스
안내	총 건의 자료가 검색되었습니다. 다운받으실 자료의 인덱스를 입력하세요. (1-10,000) 검색결과의 순서대로 최대 10,000건 까지 다운로드가 가능합니다. 데이타가 많을 경우 속도가 느려질 수 있습니다.(최대 2~3분 소요) 다운로드 파일은 UTF-8 형태로 저장됩니다. 파일의 내용이 제대로 보이지 않을실 때는 웹브라우저 상단의 보기 -> 인코딩 -> 자동선택 여부를 확인하십시오. ~ Text(ASCII format) Excel format

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[미국특허] System management mode circuits, systems and methods 원문보기

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