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Method and apparatus for balancing workloads among paths in a multi-path computer system based on the state of previous I/O operations 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-013/14
  • G06F-013/20
출원번호 US-0223998 (1998-12-31)
발명자 / 주소
  • Matthew J. D'Errico
출원인 / 주소
  • EMC Corporation
대리인 / 주소
    Wolf, Greenfield & Sacks, P.C.
인용정보 피인용 횟수 : 103  인용 특허 : 19

초록 ▼

A method and apparatus for distributing input/output (I/O) operations among at least two paths in a multi-path computer system including a host computer, a system resource and a plurality of paths coupling the host computer to the system resource. For a next I/O operation to be assigned for transmis

대표청구항 ▼

1. A method for distributing input/output (I/O) operations among at least two paths in a multi-path computer system including a host computer, a system resource and a plurality of paths coupling the host computer to the system resource, the method comprising a step of:(A) for a next I/O operation to

이 특허에 인용된 특허 (19)

  1. Goodson Richard L. ; Gusler ; Jr. Lee T. ; Hunt Gary D. ; Rushing Mickey C., Apparatus and method for determining a symbol rate and a carrier frequency for data transmission and reception.
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  5. Strecker William D. (Harvard MA) Thompson David (Malden MA) Casabona Richard (Stow MA), Dual path bus structure for computer interconnection.
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  7. Ballew James D. (Garland TX) Rogers Phil H. (Dallas TX), Fault tolerant and load sharing processing system.
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  11. Bingham John A.C. (Palo Alto CA) Jacobsen Krista S. (Mountain View CA), Methods for coordinating upstream discrete multi-tone data transmissions.
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  12. Sugita Yasushi (Kanagawa-ken JPX) Ishikawa Tatsuya (Kanagawa-ken JPX) Seki Takashi (Kanagawa-ken JPX), OFDM synchronization demodulation circuit.
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  13. Row Edward J. (Mountain View CA) Boucher Laurence B. (Saratoga CA) Pitts William M. (Los Altos CA) Blightman Stephen E. (San Jose CA), Parallel I/O network file server architecture.
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  14. Meltzer David (Wappingers Falls NY), Partial roll mode transfer for cyclic bulk memory.
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  15. Ogawa Tetsuji (Hadano JPX) Kato Masao (Hadano JPX), Priority control architecture for input/output operation.
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  19. Bremer Gordon (Clearwater FL) Holmquist Kurt E. (Largo FL) Laturell Donald R. (Tampa FL) Martinez Kenneth (Tampa FL), Technique for automatic identification of a remote modem.
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