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Method of fabricating a miniaturized integrated circuit inductor and transformer fabrication 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01F-005/00
출원번호 US-0505051 (2000-02-16)
발명자 / 주소
  • F. Scott Johnson
출원인 / 주소
  • Texas Instruments Incorporated
대리인 / 주소
    Peter K. McLarty
인용정보 피인용 횟수 : 63  인용 특허 : 6

초록 ▼

A method for fabricating inductors and transformers on integrated circuits. A magnetic material is formed on the semiconductor substrate. The magnetic material comprises a suspension of magnetic material in an insulator. A metal film is formed that forms at least one coil around the magnetic materia

대표청구항 ▼

1. A method of forming an inductor in a semiconductor substrate with an upper surface, said method comprising the steps of:forming a magnetic film on said upper surface of said semiconductor substrate; patterning said magnetic film using photolithography; forming a metal film on said upper surface o

이 특허에 인용된 특허 (6)

  1. Lee Chwan-Ying,TWX ; Huang Tzuen-Hsi,TWX, Electroless gold plating method for forming inductor structures.
    상세보기
  2. Johnson Leopold J., High power factor shielded superconducting transformer.
    상세보기
  3. Fleming Debra Anne ; Johnson ; Jr. David Wilfred ; Lambrecht ; Jr. Vincent George ; Law Henry Hon ; Liptack David Joseph ; Roy Apurba ; Thomson ; Jr. John, Method of making a device including a metallized magnetic substrate.
    상세보기
  4. El-Sharawy El-Badawy Amien ; Hashemi Majid M., Monolithic inductor with magnetic flux lines guided away from substrate.
    상세보기
  5. Tomita Hiroshi,JPX, Planar inductance element.
    상세보기
  6. Sasaki Yoshito,JPX ; Nakazawa Makoto,JPX ; Hatanai Takashi,JPX ; Makino Akihiro,JPX, Soft magnetic film, and thin film magnetic head, planer magnetic element, and filter using the soft magnetic film.
    상세보기

이 특허를 인용한 특허 (63)

  1. Liao, Tsung-Jen, Chip package structure.
    상세보기
  2. Lin, Mou-Shiung; Lee, Jin-Yuan; Huang, Ching-Cheng, Chip package with die and substrate.
    상세보기
  3. Lin, Mou-Shiung; Lee, Jin-Yuan, Chip packages having dual DMOS devices with power management integrated circuits.
    상세보기
  4. Hébert, François; Sun, Ming, Chip scale power converter package having an inductor substrate.
    상세보기
  5. Lin, Mou-Shiung, Chip structure with a passive device and method for forming the same.
    상세보기
  6. Kuo, Nick; Chou, Chiu-Ming; Chou, Chien-Kang; Lin, Chu-Fu, Chip structure with bumps and testing pads.
    상세보기
  7. Schrom, Gerhard; Hazucha, Peter; De, Vivek K.; Karnik, Tanay, DC-DC converter switching transistor current measurement technique.
    상세보기
  8. Schrom, Gerhard; Hazucha, Peter; De, Vivek; Karnik, Tanay, DC-DC converter switching transistor current measurement technique.
    상세보기
  9. Schrom, Gerhard; Hazucha, Peter; De, Vivek; Karnik, Tanay, DC-DC converter switching transistor current measurement technique.
    상세보기
  10. Liang, Morris P. F.; Chuang, Sway; Fan, Frank K. C.; Kao, Chen Chung, High density multi-layer microcoil and method for fabricating the same.
    상세보기
  11. Lin, Mou-Shiung, High performance system-on-chip discrete components using post passivation process.
    상세보기
  12. Lin, Mou-Shiung, High performance system-on-chip discrete components using post passivation process.
    상세보기
  13. Lin, Mou-Shiung, High performance system-on-chip inductor using post passivation process.
    상세보기
  14. Lin, Mou-Shing, High performance system-on-chip using post passivation process.
    상세보기
  15. Lin, Mou-Shiung, High performance system-on-chip using post passivation process.
    상세보기
  16. Lin,Mou Shiung, High performance system-on-chip using post passivation process.
    상세보기
  17. Lin,Mou Shiung, High performance system-on-chip using post passivation process.
    상세보기
  18. Gardner,Donald S., Inductors for integrated circuits.
    상세보기
  19. Gardner,Donald S., Inductors for integrated circuits.
    상세보기
  20. Lee, Jin-Yaun; Lin, Mou-Shiung; Huang, Ching-Cheng, Integrated chip package structure using ceramic substrate and method of manufacturing the same.
    상세보기
  21. Lin, Mou-Shiung; Lee, Jin-Yuan; Huang, Ching-Cheng, Integrated chip package structure using organic substrate and method of manufacturing the same.
    상세보기
  22. Lin, Mou-Shiung; Lee, Jin-Yuan; Huang, Ching-Cheng, Integrated chip package structure using silicon substrate and method of manufacturing the same.
    상세보기
  23. Gardner, Donald S., Integrated inductor.
    상세보기
  24. Gardner,Donald S., Integrated inductor.
    상세보기
  25. Crawford, Ankur Mohan; Gardner, Donald S., Integrated inductor having magnetic layer.
    상세보기
  26. Gardner, Donald S., Integrated transformer.
    상세보기
  27. Gardner, Donald S., Integrated transformer.
    상세보기
  28. Gardner, Donald S., Integrated transformer.
    상세보기
  29. Gardner, Donald S., Integrated transformer.
    상세보기
  30. Gardner, Donald S., Integrated transformer.
    상세보기
  31. Gardner, Donald S., Integrated transformer.
    상세보기
  32. Gardner,Donald S., Integrated transformer.
    상세보기
  33. Gardner,Donald S., Integrated transformer.
    상세보기
  34. Crawford, Ankur Mohan; Gardner, Donald S., Magnetic layer processing.
    상세보기
  35. Gardner,Donald S., Magnetic layer processing.
    상세보기
  36. Lee, Jin-Yuan; Lin, Mou-Shiung; Huang, Ching-Cheng, Method for fabricating chip package with die and substrate.
    상세보기
  37. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
    상세보기
  38. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
    상세보기
  39. Hatase, Minoru, Method for manufacturing module with planar coil, and module with planar coil.
    상세보기
  40. Gardner,Donald S., Method of making an integrated inductor.
    상세보기
  41. Gardner,Donald S., Method of making an integrated inductor.
    상세보기
  42. Ding,Hanyi; Feng,Kai Di; He,Zhong Xiang; Liu,Xuefeng, On-chip inductor with magnetic core.
    상세보기
  43. Ding,Hanyi; Feng,Kai Di; He,Zhong Xiang; Liu,Xuefeng, On-chip inductor with magnetic core.
    상세보기
  44. Gardner, Donald S.; Hazucha, Peter; Schrom, Gerhard, On-die micro-transformer structures with magnetic materials.
    상세보기
  45. Gardner, Donald S.; Hazucha, Peter; Schrom, Gerhard, On-die micro-transformer structures with magnetic materials.
    상세보기
  46. Fujii, Tomoharu, Passive device substrate.
    상세보기
  47. Hébert, François; Feng, Tao; Lu, Jun, Planar grooved power inductor structure and method.
    상세보기
  48. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection process and structures.
    상세보기
  49. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection process and structures.
    상세보기
  50. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection structures.
    상세보기
  51. Liang,Morris P. F.; Chuang,Sway; Fan,Frank K. C.; Kao,Chen Chung, Process for fabricating a high density multi-layer microcoil.
    상세보기
  52. Lee, Wen-Chieh; Lin, Mou-Shiung; Chou, Chien-Kang; Liu, Yi-Cheng; Chou, Chiu-Ming; Lee, Jin-Yuan, Semiconductor chip with coil element over passivation layer.
    상세보기
  53. Lee, Wen-Chieh; Lin, Mou-Shiung; Chou, Chien-Kang; Liu, Yi-Cheng; Chou, Chiu-Ming; Lee, Jin-Yuan, Semiconductor chip with coil element over passivation layer.
    상세보기
  54. Meyer, Thorsten; Waidhas, Bernd; Brunnbauer, Markus; Sommer, Grit; Wagner, Thomas, Semiconductor component including a semiconductor chip and a passive component.
    상세보기
  55. Lin, Mou-Shiung; Lee, Jin-Yuan; Huang, Ching-Cheng, Semiconductor package with interconnect layers.
    상세보기
  56. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
    상세보기
  57. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
    상세보기
  58. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
    상세보기
  59. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
    상세보기
  60. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
    상세보기
  61. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
    상세보기
  62. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
    상세보기
  63. Lin, Mou-Shiung; Wei, Gu-Yeon, Voltage regulator integrated with semiconductor chip.
    상세보기

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