이 특허에 인용된 특허 (62)

1. Schubert Rolf (Absteinach DEX) Krner Christian (Weinheim-Rippenweiher DEX), Absorber for electromagnetic and acoustic waves.

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2. Stradley Norman H. (Stillwater MN) Woolley James A. (Coon Rapids MN), Alpha-particle-emitting ceramic composite cover.

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3. Bulucea Constantin (Milpitas CA) Dermirlioglu Esin (Cupertino CA) Aronowitz Sheldon (San Jose CA), CMOS latchup suppression by localized minority carrier lifetime reduction.

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4. Bulucea Constantin (Milpitas CA) Dermirlioglu Esin (Cupertino CA) Aronowitz Sheldon (San Jose CA), CMOS latchup suppression by localized minority carrier lifetime reduction.

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5. Comizzoli Robert B. (Belle Mead NJ), Chemically treating the overcoat of a semiconductor device.

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6. Williams ; Robert Powell ; Polinsky ; Murray Arthur, Combination glass/low temperature deposited Si.sub.w N.sub.x H.sub.y O.sub.z passivating overcoat with improved crack a.

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7. Grabbe ; Dimitry G., Connector for connecting a circuit element to the surface of a substrate.

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8. Kersch Dennis R. (Phoenix AZ) Mitchell Don E. (Phoenix AZ), Copper body power hybrid package and method of manufacture.

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9. Ostop John A. ; Chen Li-Shu, Die attached process for SiC.

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10. Buonanno Samuel S. (Fairport NY), EMI shielding seal with partial conductive sheath.

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11. Sato Mitsuharu,JPX ; Yoshida Shigeyoshi,JPX ; Sato Tadakuni,JPX ; Inabe Toshihisa,JPX ; Togawa Hitoshi,JPX, Electronic device having the electromagnetic interference suppressing body.

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12. Gow ; 3rd John (Milton VT) Noth Richard W. (Fairfax VT), High performance versatile thermally enhanced IC chip mounting.

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13. Oshiba Katsuyuki (Kanagawa JPX), High-frequency circuit package.

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14. Marcantonio Gabriel (Nepean CAX) Nguyen Khanh (Nepean CAX), Integrated circuit package and assembly thereof for thermal and EMI management.

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15. Long Jon M. (Livermore CA), Integrated circuit package with device and wire coat assembly.

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16. Livshits Boris I. (Nepean CAX) Harpell Kevin E. (Ottawa CAX), Integrated circuit packaging.

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17. Schelhorn Robert L. (Vincentown NJ), Metallized ceramic circuit package.

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18. Inagaki Akihiro (Minamiashigara JPX) Yamamura Isao (Minamiashigara JPX), Method for encapsulating a semiconductor utilizing an epoxy resin and an onium salt compound.

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19. Highum Edward Allan ; Mueller Alfred Wilhelm ; Nash Thomas William ; Stadler Ewald Emil Gottlob,DEX ; Thorvilson Scott Marvin, Method for manufacturing electro-magnetic shield having multiple polymeric layers of differing fill compositions.

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20. Durand David (Portsmouth RI), Method for producing a shielded plastic enclosure to house electronic equipment.

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21. Havens Ross Downey ; Japp Robert Maynard ; Knight Jeffrey Alan ; Poliks Mark David ; Quinn ; deceased Anne M., Method for providing a protective coating and electronic package utilizing same.

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22. Sloan James W. (Austin TX) Tran Truoc T. (Austin TX) Jones ; III Frank T. (Austin TX), Method for providing alpha particle protection for an integrated circuit die.

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23. Knecht Thomas A. (Algonquin IL), Method of encapsulating a crystal oscillator.

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24. Fierkens Richardus H. J. (Keurbeek 15 Herwen NLX), Method of encapsulating microelectronic elements.

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25. Mallik Debendra (2139 S. Cottonwood Mesa AZ 85202) Bhattacharyya Bidyut K. (5063 W. Boston Way Chandler AZ 85226), Method of making a multilayer molded plastic IC package.

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26. Mori Ryuichiro (Itami JPX), Method of making resin molded semiconductor device.

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27. Kato Tsuguo (Fujisawa JPX) Thai Cao M. (Yokohama JPX), Method of manufacturing a molding using a filler or an additive concentrated on an arbitrary portion or distributed at a.

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28. Yamazaki Shunpei (Tokyo JPX) Ishida Noriya (Atsugi JPX) Sakama Mitsunori (Hiratsuka JPX) Sasaki Mari (Atsugi JPX), Method of packaging an electronic device using a common holder to carry the device in both a CVD and molding step.

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29. Sono Michio (Kawasaki JPX) Kasai Junichi (Kawasaki JPX), Method of producing semiconductor device having radiation part made of resin containing insulator powders.

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30. Sakai Kunito (Hyogo JPX) Matsuda Sadamu (Hyogo JPX) Takahama Takashi (Hyogo JPX), Method of resin encapsulating a semiconductor device.

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31. Kang Wonjae L. (Sunnyvale CA), Method of using latchup current to blow a fuse in an integrated circuit.

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32. Eichelberger Charles W. (Schenectady NY), Methods for testing and burn-in of integrated circuit chips.

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33. Scherer Jeremy D. (South Dartmouth MA), Microcircuit package and sealing method.

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34. Mallik Debendra (Mesa AZ) Bhattacharyya Bidyut K. (Chandler AZ), Multi-layer molded plastic IC package.

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35. Camilletti Robert Charles ; Haluska Loren Andrew ; Michael Keith Winton, Multilayer coating for microelectronic devices.

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36. Landsittel ; David Thomas, Novel method and apparatus for hermetic encapsulation for integrated circuits and the like.

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37. Longden Larry L. (San Diego CA), Nuclear event detector.

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38. Paquette Edward L. (Claremont CA) Riley William C. (Palos Verdes Estates CA) Taparauskas Paul A. (Solana Beach CA) Warren James W. (Woodland Hills CA), Printed circuit board with inorganic insulating matrix.

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39. Weiler Peter M. (Palo Alto CA) Burke Thomas S. (San Francisco CA), Process for coated bonding wires in high lead count packages.

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40. Koto Noriaki (Ichihara JPX) Yukawa Joei (Ichihara JPX) Moro Takeo (Ichihara JPX), Process for the production of a silver coated copper powder and conductive coating composition.

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41. Zechman John Harold, Process of making an integrated circuit chip composite.

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42. Valy Yves (Saint Medard En Jalles FRX) Gadbin Michel (Merignac FRX) Banchelin Jean S. L. (Le Haillan FRX) Bourcereau Jean (Bordeaux FRX), Protective box for electronic circuits hardened with respect to X-rays.

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43. Sainte Luce Banchelin Jean (Le Haillan FRX) Bourcereau Jean (Bordeaux FRX) Valy Yves (St. Medard en Jalles FRX), Protective sheath for electrical or optical conductors hardened with respect to X-rays.

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44. Hajdu Juan B. (Orange CT) Bastenbeck Edwin W. (Plymouth CT), RFI shielded plastic articles and process for making same.

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45. Dlugokecki Joseph J. (13666 Quiet Hills Dr. Poway CA 92064) Florian Joseph R. (11207 Zapata Ave. San Diego CA 92126), Radiation shielding for integrated circuit devices using reconstructed plastic packages.

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46. Strobel David J. ; Czajkowski David R., Radiation shielding of plastic integrated circuits.

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47. Strobel David J. ; Czajkowski David R., Radiation shielding of plastic integrated circuits.

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48. Czajkowski David ; Eggleston Neil ; Patterson Janet, Radiation shielding of three dimensional multi-chip modules.

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49. Suzuki Osamu (Yokohama JPX), Resin molded article bearing electric circuit patterns and process for producing the same.

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50. Sono Michio (Yamato JPX), Resin-sealed radiation shield for a semiconductor device.

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51. Nelson Keith W. (St. Louis Park MN) Lenz James E. (Brooklyn Park MN) Kawai Takeshi (Kanagawa JPX), Semiconductor device housing with magnetic field protection.

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52. Suzuki Hiroshi (Hitachi JPX) Tanaka Goro (Fujisawa JPX) Nishikawa Akio (Hitachi JPX) Mukai Junji (Hitachi JPX) Sato Mikio (Hitachi JPX) Makino Daisuke (Hitachi JPX) Wakashima Yoshiaki (Kawasaki JPX), Semiconductor memories with a 상세보기