초록 ▼

The present invention provides a fault tolerant bus architecture and protocol for use in an Integrated Hazard Avoidance System of the type generally used in avionics applications. In addition, the present invention may also be used in applications, aviation and otherwise, wherein data is to be handl

The present invention provides a fault tolerant bus architecture and protocol for use in an Integrated Hazard Avoidance System of the type generally used in avionics applications. In addition, the present invention may also be used in applications, aviation and otherwise, wherein data is to be handled with a high degree of integrity and in a fault tolerant manner. Such applications may include for example, the banking industry or other safety critical processing functions, including but not limited to environmental control.

대표청구항 ▼

1. A data bus system comprising:a data bus including a data line for transmitting data in a plurality of time frames, each of said time frames divided into a plurality of time slots; a processor having a corresponding application memory, said processor formulating a message for transmission on said

1. A data bus system comprising:a data bus including a data line for transmitting data in a plurality of time frames, each of said time frames divided into a plurality of time slots; a processor having a corresponding application memory, said processor formulating a message for transmission on said data bus during one of said time slots; a transmitter coupling said processor to said data line; and an arbitration circuit operatively coupled to said transmitter and said processor, said arbitration circuit generating a first signal enabling said transmitter and generating a second signal informing said processor of said enabling of said transmitter.