초록 ▼

A field effect transistor is formed with a sub-lithographic conduction channel and a dual gate which is formed by a simple process by starting with a silicon-on-insulator wafer, allowing most etching processes to use the buried oxide as an etch stop. Low resistivity of the gate, source and drain is

A field effect transistor is formed with a sub-lithographic conduction channel and a dual gate which is formed by a simple process by starting with a silicon-on-insulator wafer, allowing most etching processes to use the buried oxide as an etch stop. Low resistivity of the gate, source and drain is achieved by silicide sidewalls or liners while low gate to junction capacitance is achieved by recessing the silicide and polysilicon dual gate structure from the source and drain region edges.

대표청구항 ▼

1. A method of forming a field effect transistor including steps ofdepositing regions of pad nitride on a silicon layer, etching said silicon layer to undercut said pad nitride to form a conduction channel between a source region and a drain region, depositing polysilicon where said silicon has been

1. A method of forming a field effect transistor including steps ofdepositing regions of pad nitride on a silicon layer, etching said silicon layer to undercut said pad nitride to form a conduction channel between a source region and a drain region, depositing polysilicon where said silicon has been etched, etching through said polysilicon, depositing silicide on remaining polysilicon and silicon, and removing said silicide and polysilicon from sides of said conduction channel near said source and drain regions.