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Method and apparatus for generating multiple processor-specific code segments in a single executable 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-009/45
출원번호 US-0474714 (1999-12-29)
발명자 / 주소
  • Zia Ansari
  • Kevin B. Smith
  • Seth Abraham
출원인 / 주소
  • Intel Corporation
대리인 / 주소
    Schwegman, Lundberg, Woessner & Kluth, P.A.
인용정보 피인용 횟수 : 32  인용 특허 : 14

초록

A computer-implemented method analyzes a source code segment which is to be compiled for execution by any one of several different processor types. The method determines whether a performance advantage would be achieved by generating a customized version of object code that can be executed by one of

대표청구항

1. A computer-implemented method to be performed by a compiler comprising:analyzing a source code segment which is to be customized to a plurality of different processor types; determining whether generating customized sections of object code for the source code segment to execute on each of the plu

이 특허에 인용된 특허 (14)

  1. Hodjat Babak ; Savoie Christopher J. ; Amamiya Makoto,JPX, Adaptive agent-oriented software architecture.
  2. Heninger Andrew G. (Santa Clara CA), Apparatus and method for dynamic linking of computer software components.
  3. Kimura Eiichi,JPX, Breakpoint setting/deleting system using a symbolic debugger in a digital data processing system.
  4. Chinnaswamy Ackanaickenpalayam V. (Westboro MA) Wilk Stanley A. (Worcester MA) Torrey ; Jr James H. (Grafton MA), Data processor performance advisor.
  5. Pechanek Gerald G. ; Larsen Larry D. ; Glossner Clair John ; Vassiliaadis Stamatis,NLX, Distributed processing array with component processors performing customized interpretation of instructions.
  6. Alcorn John William, Method and apparatus for analyzing performance of a Java bean.
  7. Tevanian Avadis (Palo Alto CA) Demoney Michael (San Jose CA) Enderby Kevin (Redwood City CA) Wiebe Douglas (Redwood City CA) Snyder Garth (Boulder CO), Method and apparatus for architecture independent executable files.
  8. Washington Peter ; Barton Richard R., Method and apparatus for executing a family generic processor specific application.
  9. Smith Kevin B. ; Nelson Clark F. ; Abraham Seth, Method and apparatus for supporting multiple processor-specific code segments in a single executable.
  10. Dunn David A., Method for achieving native performance across a set of incompatible architectures using a single binary file.
  11. Agrawal Rakesh (San Jose CA) De Michiel Linda Gail (Los Altos CA) Lindsay Bruce Gilbert (San Jose CA), Methods to support multimethod function overloading with compile-time type checking.
  12. Rupp Charle R., Reconfigurable computer architecture for use in signal processing applications.
  13. Brooks Evan ; Padula Thomas J. ; Currie Robert E. ; Richert Peter A., System and method for distributing processing among one or more processors.
  14. Ahmed Sultan, System for controlled generation of assembly language instructions using assembly language data types including instruct.

이 특허를 인용한 특허 (32)

  1. Heddes, Marco C.; Leavens, Ross Boyd; Rinaldi, Mark Anthony, Assembler tool for processor-coprocessor computer systems.
  2. Aguilar, Jr., Maximino; Day, Michael Norman; Nutter, Mark Richard; Stafford, James Michael, Asymmetric heterogeneous multi-threaded operating system.
  3. Minor, Barry L; Nutter, Mark Richard; To, VanDung Dang, Balancing computational load across a plurality of processors.
  4. Minor,Barry L; Nutter,Mark Richard; To,VanDung Dang, Balancing computational load across a plurality of processors.
  5. Schneider,Manfred; Sindambiwe,Eugene, Code diversification.
  6. Linderman, Michael D.; Collins, Jamison D.; Wang, Perry; Wang, Hong, Compiler and runtime for heterogeneous multiprocessor systems.
  7. Sigmund,Ulrich, Dynamic generation of multimedia code for image processing.
  8. Crasovan, Eveline H.; Acker, Michael; Remmel, Juergen K.; Fiedler, Thomas, Dynamic software enhancement.
  9. Crasovan, Eveline H.; Acker, Michael; Remmel, Juergen K.; Fiedler, Thomas, Dynamic software enhancement parameters.
  10. Brokenshire, Daniel Alan; Hofstee, Harm Peter; Minor, Barry L; Nutter, Mark Richard, Dynamically partitioning processing across a plurality of heterogeneous processors.
  11. Brokenshire,Daniel Alan; Hofstee,Harm Peter; Minor,Barry L; Nutter,Mark Richard, Dynamically partitioning processing across plurality of heterogeneous processors.
  12. Clifton, Nicholas O. J.; Brolley, David M.; Bachalo, Eric J., Function-level compiler processing optimization.
  13. Aguilar, Jr., Maximino; Day, Michael Norman; Nutter, Mark Richard; Xenidis, James, Grouping processors and assigning shared memory space to a group in a heterogeneous computer environment.
  14. Aguilar, Jr., Maximino; Chow, Alex Chunghen; Day, Michael Norman; Gowen, Michael Stan; Nutter, Mark Richard; Xenidis, James, Loading software on a plurality of processors.
  15. Aguilar, Jr.,Maximino; Chow,Alex Chunghen; Day,Michael Norman; Gowen,Michael Stan; Nutter,Mark Richard; Xenidis,James, Loading software on a plurality of processors.
  16. Aguilar, Jr., Maximino; Day, Michael Norman; Nutter, Mark Richard; Stafford, James Michael, Managing a plurality of processors as devices.
  17. Chipman, Timothy, Method and system for program transformation using flow-sensitive type constraint analysis.
  18. Sigmund, Ulrich, On the fly generation of multimedia code for image processing.
  19. Aguilar, Jr., Maximino; Nutter, Mark Richard; Stafford, James Michael, Processor dedicated code handling in a multi-processor environment.
  20. Aguilar, Jr., Maximino; Nutter, Mark Richard; Stafford, James Michael, Processor dedicated code handling in a multi-processor environment.
  21. Chipman, Timothy, Program transformation using flow-sensitive type constraint analysis.
  22. Kuesel, Jamie R.; Kupferschmidt, Mark G.; Schardt, Paul E.; Shearer, Robert A., Providing performance tuned versions of compiled code to a CPU in a system of heterogeneous cores.
  23. Kuesel, Jamie R.; Kupferschmidt, Mark G.; Schardt, Paul E.; Shearer, Robert A., Providing performance tuned versions of compiled code to a CPU in a system of heterogeneous cores.
  24. Glanville,Robert Steven; Kilgard,Mark J.; Lindholm,John Erik, Software emulator for optimizing application-programmable vertex processing.
  25. Aguilar, Jr.,Maximino; Day,Michael Norman; Nutter,Mark Richard; Xenidis,James, System and method for grouping processors and assigning shared memory space to a group in heterogeneous computer environment.
  26. Aguilar, Jr.,Maximino; Manning,Sidney James; Nutter,Mark Richard; Stafford,James Michael, System and method for processor thread for software debugging.
  27. Aguilar, Jr.,Maximino; Craft,David; Day,Michael Norman; Hatakeyama,Akiyuki; Hofstee,Harm Peter; Suzuoki,Masakazu, System and method for selecting and using a signal processor in a multiprocessor system to operate as a security for encryption/decryption of data.
  28. Nutter,Mark Richard; To,VanDung Dang, System and method for solving a large system of dense linear equations.
  29. Brokenshire,Daniel Alan; Day,Michael Norman; Minor,Barry L; Nutter,Mark Richard; To,VanDung Dang, Task queue management of virtual devices using a plurality of processors.
  30. Nagendra, Gururaj; Taylor, Stewart N., Using optimized libraries to improve performance of deployed application code at runtime.
  31. Brokenshire,Daniel Alan; Day,Michael Norman; Minor,Barry L; Nutter,Mark Richard, Virtual devices using a pluarlity of processors.
  32. Brokenshire, Daniel Alan; Day, Michael Norman; Minor, Barry L; Nutter, Mark Richard, Virtual devices using a plurality of processors.
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