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Data storage system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-012/00
출원번호 US-0223417 (1998-12-30)
발명자 / 주소
  • Brian Arsenault
  • Victor W. Tung
  • Jeffrey Stoddard Kinne
출원인 / 주소
  • EMC Corporation
대리인 / 주소
    Daly, Crowley & Mofford LLP
인용정보 피인용 횟수 : 19  인용 특허 : 15

초록

A data storage system wherein a host computer is coupled to a bank of disk drives through a system interface. The interface includes a system memory comprising a pair of system memory sections. Each one of the system memory sections has a plurality of addressable locations for storing data written i

대표청구항

1. A data storage system wherein a host computer is coupled to a bank of disk drives through an interface, such interface comprising:a system memory comprising a pair of system memory sections, each one of the memory sections having a plurality of addressable locations for storing data written into

이 특허에 인용된 특허 (15)

  1. Klein Dean A., Apparatus for allowing data transfers with a memory having defective storage locations.
  2. Leshem Eli, Bus arbitration system having a pair of logic networks to control data transfer between a memory and a pair of buses.
  3. Kabenjian Gregory V. (Duarte CA), Bus interface to a RAID architecture.
  4. Bagley Robert Craig, Cache ram using a secondary controller and switching circuit and improved chassis arrangement.
  5. Mizuno Masahiro,JPX ; Ogawa Akira,JPX ; Matsumoto Toshio,JPX ; Ogura Shiro,JPX ; Ito Kazuhiko,JPX ; Yamamoto Hitoshi,JPX ; Ito Kazuo,JPX ; Baba Hiroshi,JPX, Data storage system and storage managing method.
  6. Brant William Alexander ; Nielson Michael Edward ; Howard Gary Ward, Fault tolerant controller system and method.
  7. Stiffler Jack J., Main memory system and checkpointing protocol for fault-tolerant computer system.
  8. Stiffler Jack J., Main memory system and checkpointing protocol for fault-tolerant computer system.
  9. Stiffler Jack J. (Concord MA) Budwey Michael J. (Holliston MA) Nolan ; Jr. James M. (Holliston MA), Memory back up system with one cache memory and two physically separated main memories.
  10. Stiffler Jack J. (Concord MA) Budwey Michael J. (Holliston MA) Nolan James M. (Holliston MA), Memory back-up system.
  11. Loechel Barbara ; Giovannetti Federico, Method and device using a redundant cache for preventing the loss of dirty data.
  12. Lattimore George McNeil ; Leasure Terry Lee ; Yeung Gus Wai-Yan, Redundant memory array.
  13. Roush Paul E. (Austin TX), Serial data interface with circular buffer.
  14. Ninomiya Tatuya,JPX ; Masuzaki Hidefumi,JPX ; Kurosawa Hiroyuki,JPX ; Takahashi Naoya,JPX ; Inoue Yasuo,JPX ; Iwasaki Hidehiko,JPX ; Hoshino Masayuki,JPX ; Isono Soichi,JPX, Storage system realizing scalability and fault tolerance.
  15. Yanai Moshe (Framingham MA) Vishlitzky Natan (Brookline MA) Alterescu Bruno (Newton MA) Castel Daniel (Farmingham MA), System and method for disk mapping and data retrieval.

이 특허를 인용한 특허 (19)

  1. Davies,Ian Robert; Maine,Gene; Pecone,Victor Key, Apparatus and method for adopting an orphan I/O port in a redundant storage controller.
  2. Maine,Gene, Broadcast bridge apparatus for transferring data to redundant memory subsystems in a storage controller.
  3. Sandorfi,Miklos, Central processing unit.
  4. Ashmore, Paul Andrew; Davies, Ian Robert; Maine, Gene; Vedder, Rex Weldon, Certified memory-to-memory data transfer between active-active raid controllers.
  5. Pecone,Victor Key, Controller data sharing using a modular DMA architecture.
  6. Gordon, Stephen; Iler, John; Hellman, Tim, Managing bursts of data.
  7. Davies, Ian Robert; Pecone, Victor Key, Method for adopting an orphan I/O port in a redundant storage controller.
  8. Davies,Ian Robert; Maine,Gene; Vedder,Rex Weldon, Method for efficient inter-processor communication in an active-active RAID system using PCI-express links.
  9. Pecone,Victor Key, Modular architecture for a network storage controller.
  10. Ashmore,Paul Andrew; Davies,Ian Robert; Maine,Gene, RAID system for performing efficient mirrored posted-write operations.
  11. Ashmore, Paul Andrew, Redundant storage controller system with enhanced failure analysis capability.
  12. Chiu, Lawrence Y.; Muench, Paul H.; Seshadri, Sangeetha, Runtime dynamic performance skew elimination.
  13. Chiu, Lawrence Y.; Muench, Paul H.; Seshadri, Sangeetha, Runtime dynamic performance skew elimination.
  14. Chiu, Lawrence Y.; Muench, Paul H.; Seshadri, Sangeetha, Runtime dynamic performance skew elimination.
  15. Chiu, Lawrence Y.; Muench, Paul H.; Seshadri, Sangeetha, Runtime dynamic performance skew elimination.
  16. Chiu, Lawrence Y.; Muench, Paul H.; Seshadri, Sangeetha, Runtime dynamic performance skew elimination.
  17. Davies, Ian Robert, Safe message transfers on PCI-Express link from RAID controller to receiver-programmable window of partner RAID controller CPU memory.
  18. Davies, Ian Robert, System and method for sharing SATA drives in active-active RAID controller system.
  19. Maine,Gene, Transferring data using direct memory access.
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