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[미국특허] Methods and structures for electronic probing arrays 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • A05K-003/00
출원번호 US-0405029 (1999-09-24)
발명자 / 주소
  • Joseph Fjelstad
출원인 / 주소
  • Tessera, Inc.
대리인 / 주소
    Lerner, David, Littenberg, Krumholz & Mentlik, LLP
인용정보 피인용 횟수 : 68  인용 특허 : 33

초록 ▼

A probe card for testing an electrical element such as a semiconductor wafer or a printed wiring board includes a substrate with circuitry thereon, an encapsulant layer overlying the substrate and a multiplicity of leads extending upwardly from the substrate through the encapsulant layer to terminal

대표청구항 ▼

1. A method of making a probe card comprising the steps of:(a) providing a sacrificial layer, a substrate having electrical circuits thereon and a plurality of elongated leads, each said lead having a first end connected to said sacrificial layer, and a second end attached to said substrate and conn

이 특허에 인용된 특허 (33) 인용/피인용 타임라인 분석

  1. Khandros Igor Y. ; Mathieu Gaetan L., Composite interconnection element for microelectronic components, and method of making same.
    상세보기
  2. Beaman Brian S. (Hyde Park NY), Elastomeric area array interposer.
    상세보기
  3. Kwon Oh-Kyong (Plano TX) Hashimoto Masashi (Garland TX) Malhi Satwinder (Garland TX) Born Eng C. (Richardson TX), Full wafer integrated circuit testing device.
    상세보기
  4. Whann Welton B. (San Diego CA) Elizondo Paul M. (Escondido CA), High density probe card.
    상세보기
  5. Whann Welton B. (San Diego CA) Elizondo Paul M. (Escondido CA), High density probe card.
    상세보기
  6. Fjelstad Joseph, Low profile socket for microelectronic components and method for making the same.
    상세보기
  7. Liu Ken K. F. (Saratoga CA) Min Byoung-Youl (Cupertino CA) Moti Robert J. (San Jose CA) Husain Syed A. (Milpitas CA), Membrane probing of circuits.
    상세보기
  8. Elder Richard A. (Dallas TX) Wilson Arthur M. (Dallas TX) Bagen Susan V. (Dallas TX) Miller Juanita G. (Richardson TX), Method for fabrication of probe card for testing of semiconductor devices.
    상세보기
  9. Yanof Arnold W. (Tempe AZ) Dauksher William (Mesa AZ), Method for manufacturing a probe.
    상세보기
  10. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of exercising semiconductor devices.
    상세보기
  11. Miller Brian S. (Stafford VA) Kaplan David R. (Burke VA), Method of making a flexible membrane circuit tester.
    상세보기
  12. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of planarizing tips of probe elements of a probe card assembly.
    상세보기
  13. Khandros Igor Y. ; Mathieu Gaetan L., Method of stacking electronic components.
    상세보기
  14. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of temporarily, then permanently, connecting to a semiconductor device.
    상세보기
  15. Eldridge Benjamin N. ; Grube Gary W. ; Khandros Igor Y. ; Mathieu Gaetan L., Method of testing semiconductor.
    상세보기
  16. Smith John W. ; Fjelstad Joseph, Microelectronic assembly fabrication with terminal formation from a conductive layer.
    상세보기
  17. DiStefano Thomas H. (Monte Sereno CA) Smith John W. (Palo Alto CA), Microelectronic mounting with multiple lead deformation and bonding.
    상세보기
  18. DiStefano Thomas H. ; Smith John W., Microelectronic mounting with multiple lead deformation and bonding.
    상세보기
  19. DiStefano Thomas H. (Monte Sereno CA) Smith ; Jr. John W. (Austin TX), Microelectronics unit mounting with multiple lead bonding.
    상세보기
  20. Elder Richard A. (Dallas TX) Johnson Randy (Carrollton TX) Frew Dean L. (Garland TX) Wilson Arthur M. (Dallas TX), Non-destructive burn-in test socket for integrated circuit die.
    상세보기
  21. Smith Donald L. (Palo Alto CA) Alimonda Andrew S. (Los Altos CA), Photolithographically patterned spring contact.
    상세보기
  22. Woith Blake F. (Orange CA), Pivotable self-centering elastomer pressure-wafer probe.
    상세보기
  23. Ueno Toshiaki (Yokohama JPX) Kondoh You (Yokohama JPX), Probe and electrical part/circuit inspecting apparatus as well as electrical part/circuit inspecting method.
    상세보기
  24. Liu Jui-Hsiang (Chandler AZ) Olsen Dennis R. (Scottsdale AZ), Probe card for testing unencapsulated semiconductor devices.
    상세보기
  25. Higgins J. Aiden (Westlake Village CA) Walton ; Jr. Emory R. (Thousand Oaks CA), Process for making a probe for high speed integrated circuits.
    상세보기
  26. Swarbrick David B. (Mission Viejo CA) Pike Jack H. (Dana Point CA), Radial tensioning lamination fixture for membrane test probe.
    상세보기
  27. Hirano Toshiki (Tokyo-to JPX) Kimura Atsuo (Ohtsu JPX) Mori Shinichiro (Kusatsu JPX), Semi-conductor chip test probe.
    상세보기
  28. Grube Gary (Monroe NY) Khandros Igor (Peekskill NY) Mathieu Gaetan (Carmel NY), Semiconductor chip assemblies and components with pressure contact.
    상세보기
  29. Grube Gary (Monroe NY) Khandros Igor (Peekskill NY) Mathieu Gaetan (Carmel NY), Semiconductor chip assemblies and components with pressure contact.
    상세보기
  30. Khandros Igor Y. (Peekskill NY) DiStefano Thomas H. (Bronxville NY), Semiconductor chip assemblies having interposer and flexible lead.
    상세보기
  31. Khandros Igor Y. (Peekskill NY) DiStefano Thomas H. (Bronxville NY), Semiconductor chip assemblies with fan-in leads.
    상세보기
  32. Khandros Igor Y. (Peekskill NY) Distefano Thomas H. (Bronxville NY), Semiconductor chip assemblies, methods of making same and components for same.
    상세보기
  33. Widder David C. (Billerica MA) Ringleb Diethelm G. (Andover MA), Semiconductor probe and alignment system.
    상세보기

이 특허를 인용한 특허 (68) 인용/피인용 타임라인 분석

  1. Lee, Jin-Yuan; Huang, Ching-Cheng; Lin, Mou-Shiung, Chip package.
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  2. Chow, Eugene M.; Chua, Christopher L.; Peeters, Eric, Contact spring application to semiconductor devices.
    상세보기
  3. Chow, Eugene M.; Chua, Christopher L.; Peeters, Eric, Contact spring application to semiconductor devices.
    상세보기
  4. Chow, Eugene M.; DeBruyker, Dirk, Curved spring structure with downturned tip.
    상세보기
  5. Hantschel, Thomas; Chow, Eugene M., Curved spring structure with elongated section located under cantilevered section.
    상세보기
  6. Hantschel,Thomas; Chow,Eugene M., Curved spring structure with elongated section located under cantilevered section.
    상세보기
  7. Cohen, Adam L.; Kumar, Ananda H.; Lockard, Michael S.; Smalley, Dennis R., Electrochemical fabrication process for forming multilayer multimaterial microprobe structures.
    상세보기
  8. Cohen, Adam L.; Kumar, Ananda H.; Lockard, Michael S.; Smalley, Dennis R., Electrochemical fabrication process for forming multilayer multimaterial microprobe structures.
    상세보기
  9. Kazama,Toshio, Electroconductive contact unit.
    상세보기
  10. Cohen, Adam L.; Arat, Vacit; Lockard, Michael S.; Bang, Christopher A.; Lembrikov, Pavel B., Fabrication process for co-fabricating multilayer probe array and a space transformer.
    상세보기
  11. Lindsey,Scott E.; Miller,Charles A.; Royster,David M.; Wenzel,Stuart W., Helical microelectronic contact and method for fabricating same.
    상세보기
  12. Chow,Eugene M.; Fork,David K.; Hantschel,Thomas; Van Schuylenbergh,Koenraad F.; Chua,Christopher L., High force metal plated spring structure.
    상세보기
  13. Lewinnek, David Walter; Sinsheimer, Roger Allen; Valiente, Luis Antonio; DiPalo, Craig Anthony, Interconnect for transmitting signals between a device and a tester.
    상세보기
  14. Khandros,Igor Y.; Miller,Charles A.; Wenzel,Stuart W., Layered microelectronic contact and method for fabricating same.
    상세보기
  15. Kinsman, Larry D.; Akram, Salman, Method for fabricating a chip scale package using wafer level processing.
    상세보기
  16. Kinsman, Larry D.; Akram, Salman, Method for fabricating a chip scale package using wafer level processing.
    상세보기
  17. Kinsman,Larry D.; Akram,Salman, Method for fabricating a chip scale package using wafer level processing.
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  18. Kwang, Chua Swee; Poo, Chia Yong, Method for fabricating semiconductor packages with discrete components.
    상세보기
  19. Eldridge,Benjamin N.; Grube,Gary W.; Khandros,Igor Y.; Mathieu,Gaetan L., Method for mounting a plurality of spring contact elements.
    상세보기
  20. Lee, Jin-Yuan; Huang, Ching-Cheng; Lin, Mou-Shiung, Method of fabricating chip package.
    상세보기
  21. Kim,Kieun; Cohen,Adam L.; Larsen,Willa M.; Chen,Richard T.; Kumar,Ananda H.; Kruglick,Ezekiel J. J.; Arat,Vacit; Zhang,Gang; Lockard,Michael S., Method of making a contact.
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  22. Mathieu, Gaetan L.; Eldridge, Benjamin N.; Grube, Gary W., Method of making lithographic contact elements.
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  23. Baleras, Francois; Souriau, Jean-Charles; Henry, David, Method of producing a via in a reconstituted substrate.
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  24. Lee, Jin-Yuan; Chen, Ying-Chih; Lin, Mou-Shiung, Method of wire bonding over active area of a semiconductor circuit.
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  25. Lee, Jin-Yuan; Chen, Ying-Chih; Lin, Mou-Shiung, Method of wire bonding over active area of a semiconductor circuit.
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  26. Lee, Jin-Yuan; Chen, Ying-Chih; Lin, Mou-Shiung, Method of wire bonding over active area of a semiconductor circuit.
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  27. Lee, Jin-Yuan; Chen, Ying-Chih; Lin, Mou-Shiung, Method of wire bonding over active area of a semiconductor circuit.
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  28. Lee, Jin-Yuan; Chen, Ying-Chih; Lin, Mou-Shiung, Method of wire bonding over active area of a semiconductor circuit.
    상세보기
  29. Lee, Jin-Yuan; Chen, Ying-chih, Method of wire bonding over active area of a semiconductor circuit.
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  30. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Method of wirebonding that utilizes a gas flow within a capillary from which a wire is played out.
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  31. Chen, Richard T.; Kruglick, Ezekiel J. J.; Bang, Christopher A.; Smalley, Dennis R.; Lembrikov, Pavel B., Methods of creating probe structures from a plurality of planar layers.
    상세보기
  32. Chen, Richard T.; Kruglick, Ezekiel J. J.; Bang, Christopher A.; Smalley, Dennis R.; Lembrikov, Pavel B., Methods of creating probe structures from a plurality of planar layers.
    상세보기
  33. Chen, Richard T.; Kruglick, Ezekiel J. J.; Bang, Christopher A.; Smalley, Dennis R.; Lembrikov, Pavel B., Methods of creating probe structures from a plurality of planar layers.
    상세보기
  34. Dong,Wen Chang, Micro-electromechanical probe circuit substrate.
    상세보기
  35. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure.
    상세보기
  36. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure and method of making same.
    상세보기
  37. Kim,Kieun; Cohen,Adam L.; Larsen,Willa M.; Chen,Richard T.; Kumar,Ananda H.; Kruglick,Ezekiel J. J.; Arat,Vacit; Zhang,Gang; Lockard,Michael S., Microprobe tips and methods for making.
    상세보기
  38. Kim,Kieun; Cohen,Adam L.; Larsen,Willa M.; Chen,Richard T.; Kumar,Ananda H.; Kruglick,Ezekiel J. J.; Arat,Vacit; Zhang,Gang; Lockard,Michael S.; Bang,Christopher A., Microprobe tips and methods for making.
    상세보기
  39. Wu, Ming Ting; Larsen, III, Rulon Joseph; Kim, Young; Kim, Kieun; Cohen, Adam L.; Kumar, Ananda H.; Lockard, Michael S.; Smalley, Dennis R., Multi-layer, multi-material fabrication methods for producing micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties.
    상세보기
  40. Wu, Ming Ting; Larsen, III, Rulon J.; Kim, Young; Kim, Kieun; Cohen, Adam L.; Kumar, Ananda H.; Lockard, Michael S.; Smalley, Dennis R., Multi-layer, multi-material micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties.
    상세보기
  41. Wu, Ming Ting; Larsen, III, Rulon J.; Kim, Young; Kim, Kieun; Cohen, Adam L.; Kumar, Ananda H.; Lockard, Michael S.; Smalley, Dennis R., Multi-layer, multi-material micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties.
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  42. Lin, Mou-Shiung; Peng, Bryan, Multiple chips bonded to packaging structure with low noise and multiple selectable functions.
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  43. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Probe card assembly and kit, and methods of making same.
    상세보기
  44. Mathieu, Gaetan L.; Eldridge, Benjamin N.; Grube, Gary W., Probe card assembly having an actuator for bending the probe substrate.
    상세보기
  45. Lee, Yong Goo; Lee, Maeng Youl, Probe card having a plurality of space transformers.
    상세보기
  46. Chen, Richard T.; Kruglick, Ezekiel J. J.; Bang, Christopher A.; Smalley, Dennis R.; Lembrikov, Pavel B., Probe devices formed from multiple planar layers of structural material with tip regions formed from one or more intermediate planar layers.
    상세보기
  47. McFarland, Andrew W., Probe element having a substantially zero stiffness and applications thereof.
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  48. Tanioka, Michinobu; Kimura, Takahiro, Probe for inspecting semiconductor device and method of manufacturing the same.
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  49. Hattori, Atsuo; Sawada, Shuichi; Sugiura, Masahiro; Terada, Yoshiki, Probe unit having resilient metal leads.
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  50. Hantschel, Thomas; Fork, David K., Process for making a spring.
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  51. Gritters, John K.; Eldridge, Benjamin N.; Breinlinger, Keith J., Resilient contact element and methods of fabrication.
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  52. Lin, Mou-Shiung; Chou, Chiu-Ming, Semiconductor chip and method for fabricating the same.
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  53. Umeda, Kazuo; Matsunaga, Keiichi, Semiconductor device including acrylic resin layer.
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  54. Kwang, Chua Swee; Poo, Chia Yong, Semiconductor package having die with recess and discrete component embedded within the recess.
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  55. Maruyama, Shigeyuki; Tashiro, Kazuhiro; Haseyama, Makoto, Semiconductor testing device.
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  64. Lee, Jin-Yuan; Huang, Ching-Cheng; Lin, Mou-Shiung, Structure and manufacturing method of chip scale package.
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  65. Sinsheimer, Roger Allen, Structure for transmitting signals in an application space between a device under test and test electronics.
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  67. Lee, Soo Ho, Test socket for semiconductor.
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  68. Hantschel, Thomas; Fork, David K., ‘All in one’ spring process for cost-effective spring manufacturing and spring self-alignment.
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