초록 ▼

A vessel for cooking food under pressure wherein the shape of a bottom surface of the vessel and the position of heating elements which heat cooking fluid contained within the vessel act to form a cool zone in a region near the bottom surface. Within the cool zone, the temperature of the cooking flu

A vessel for cooking food under pressure wherein the shape of a bottom surface of the vessel and the position of heating elements which heat cooking fluid contained within the vessel act to form a cool zone in a region near the bottom surface. Within the cool zone, the temperature of the cooking fluid is maintained below the cooking temperature so that food particles dislodged from the food being cooked do not burn and contaminate the cooking fluid. In addition, the temperature in the cool zone is maintained above the boiling point of water so that moisture contained within the food particles is continuously evaporated during the cooking cycle, preventing boil over conditions. A novel pressure release system is provided for intermittently operating a pressure release valve near the end of the cooking cycle. A computer controller controls operation of the release valve based upon the temperature of the cooking fluid to eliminate sudden drops in temperature.

대표청구항 ▼

A vessel for cooking food under pressure wherein the shape of a bottom surface of the vessel and the position of heating elements which heat cooking fluid contained within the vessel act to form a cool zone in a region near the bottom surface. Within the cool zone, the temperature of the cooking flu

A vessel for cooking food under pressure wherein the shape of a bottom surface of the vessel and the position of heating elements which heat cooking fluid contained within the vessel act to form a cool zone in a region near the bottom surface. Within the cool zone, the temperature of the cooking fluid is maintained below the cooking temperature so that food particles dislodged from the food being cooked do not burn and contaminate the cooking fluid. In addition, the temperature in the cool zone is maintained above the boiling point of water so that moisture contained within the food particles is continuously evaporated during the cooking cycle, preventing boil over conditions. A novel pressure release system is provided for intermittently operating a pressure release valve near the end of the cooking cycle. A computer controller controls operation of the release valve based upon the temperature of the cooking fluid to eliminate sudden drops in temperature. 9-39). data value, the prefix/mask CAM cells of the row being commonly coupled to the associated match line and driving their associated match line to the first predetermined level when their encoded prefix/mask data is different than the encoded longest prefix/mask value. 6. The CAM device of claim 5, further including: a plurality of prefix lines that can carry a longest prefix value in response to a comparand value being compared to maskable data values; a plurality of encoded prefix lines that can carry the encoded longest prefix value of the encoder; each column of data CAM cells is commonly coupled to an associated prefix line; and each column of prefix/mask CAM cells is commonly coupled to an associated encoded prefix line. 7. The CAM device of claim 5, wherein: each data CAM cell includes a data compare circuit that can compare an applied comparand value bit to a stored data value bit and provide a data bit comparison result, a mask circuit that can couple the data bit comparison result to the associated match line according to a stored prefix/mask value bit, and a prefix bit detect circuit that can generate a prefix value on the associated prefix/mask line according to the stored prefix/mask value bit and level of the associated match line; and each prefix/mask CAM cell includes a prefix/mask compare circuit that can compare a longest prefix bit value to the stored prefix/mask value and provide a prefix bit comparison result to the associated match line. 8. A content addressable memory (CAM), comprising: a plurality of data CAM cells arranged into rows and columns, the data CAM cells of the same column being commonly coupled to an associated prefix line, the data CAM cells of the same row being commonly coupled to an associated match line, each data CAM cell including a data register that can store a data bit, a prefix/mask register that can store a prefix/mask bit, a data compare circuit that can compare the data bit stored in the data register with a comparand bit, a mask circuit that can couple the data compare circuit to its associated match line; and a prefix/mask detect circuit that drives its associated prefix line to a predetermined logic level according to a prefix/mask bit stored in the prefix/mask register and a match line voltage level. 9. The CAM of claim 8, wherein: each prefix/mask detect circuit includes a controllable impedance path disposed between its associated prefix line and the predetermined logic level, the controllable impedance path providing a relatively low impedance when its prefix/mask register stores a particular prefix/mask bit and its match line is at a particular voltage level. 10. The CAM of claim 9, further including: a hit line associated with each match line of a row of data CAM cells, each hit line being activated when its associated match line is activated; and each prefix/mask detect circuit includes a first insulated gate field effect transistor (IGFET) and a second IGFET having source-drain paths arranged in series, the gate of the first IGFET being coupled to the hit line of its associated row of data CAM cells, the gate of the second IGFET being coupled to the prefix/mask register of its data CAM cell. 11. The CAM of claim 8, wherein: the data compare circuit of each CAM cell provides a compare impedance path having a relatively low impedance when its data bit does not match its comparand bit; and the mask circuit of each CAM cell provides a mask impedance path having a relatively low impedance path when the prefix/mask bit has a predetermined logic value. 12. The CAM of claim 8, wherein: each data CAM cell further includes a prefix/mask compare circuit coupled to the match line of its associated row of CAM cells, the prefix/mask compare circuit comparing the prefix/mask bit stored in the prefix/mask register with a longest prefix value bit. 13. The CAM of claim 8, further including: a plurality of prefix/mask CAM cells ar