Fuel assembly and reactor core and fuel spacer and channel box
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G21C-003/00
G21C-003/34
출원번호
US-0471606
(1999-12-23)
우선권정보
JP-0367757 (1998-12-24)
발명자
/ 주소
Chaki, Masao
Nishida, Koji
Aoyama, Motoo
Koyama, Junichi
Haikawa, Katsumasa
Aizawa, Yasuhiro
출원인 / 주소
Hitachi, Ltd., Hitachi Engineering Co., Ltd.
대리인 / 주소
Mattingly, Stanger & Malur, P.C.
인용정보
피인용 횟수 :
13인용 특허 :
4
초록▼
A fuel assembly includes a plurality of fuel rods placed in a square lattice array of 9-rows/9-columns and at least one water rod. In this fuel assembly, the fuel rod pitch of the plurality of fuel rods is in a range of 14.15 mm to 14.65 mm, and means for offsetting and holding a fuel bundle compose
A fuel assembly includes a plurality of fuel rods placed in a square lattice array of 9-rows/9-columns and at least one water rod. In this fuel assembly, the fuel rod pitch of the plurality of fuel rods is in a range of 14.15 mm to 14.65 mm, and means for offsetting and holding a fuel bundle composed of the fuel rods and the water rod is provided in such a manner that the center in a cross section of the fuel bundle is offset from the center in a cross section of the lower tie plate toward the channel fastener side. With this configuration, it is possible to provide a fuel assembly for a D-lattice core, which is capable of achieving the fuel economy comparable to that of a C-lattice core without reducing the thermal margin, and of using the existing fuel spacers.
대표청구항▼
A fuel assembly includes a plurality of fuel rods placed in a square lattice array of 9-rows/9-columns and at least one water rod. In this fuel assembly, the fuel rod pitch of the plurality of fuel rods is in a range of 14.15 mm to 14.65 mm, and means for offsetting and holding a fuel bundle compose
A fuel assembly includes a plurality of fuel rods placed in a square lattice array of 9-rows/9-columns and at least one water rod. In this fuel assembly, the fuel rod pitch of the plurality of fuel rods is in a range of 14.15 mm to 14.65 mm, and means for offsetting and holding a fuel bundle composed of the fuel rods and the water rod is provided in such a manner that the center in a cross section of the fuel bundle is offset from the center in a cross section of the lower tie plate toward the channel fastener side. With this configuration, it is possible to provide a fuel assembly for a D-lattice core, which is capable of achieving the fuel economy comparable to that of a C-lattice core without reducing the thermal margin, and of using the existing fuel spacers. ency of the slave module (ME), conveyed through the link connecting the slave module (ME) to the master module (MM), and with a cycle imposed by the clock of the master module (MM). 3. A process according to claim 1, characterized in that digital synchronization on transmission, comprises: detecting a start-of-frame conveyed through each link; and digitally aligning a start-of-frame of each channel with a start-of-frame pattern sent by the master module (MM). 4. A process according to claim 2, characterized in that digital synchronization on transmission, comprises: detecting a start-of-frame conveyed through each link; and digitally aligning a start-of-frame of each channel with a start-of-frame pattern sent by the master module (MM). 5. A process according to claim 1, characterized in that for the analog synchronization on reception, comprises: designating a master channel (L1) among all of the channels forming the link connecting each slave module (ME) to the master module (MM); extracting the clock signal sent by the module connected to the link from the data conveyed through the master channel (Li); and generating a clock signal (C1) with a frequency higher than the frequency of the extracted clock signal, to be used as a sampling frequency for the respective data signals extracted from the other links (Li). 6. A process according to claim 2, characterized in that for the analog synchronization on reception, comprises: designating a master channel (L1) among all of the channels forming the link connecting each slave module (ME) to the master module (MM); extracting the clock signal sent by the module connected to the link from the data conveyed through the master channel (Li); and generating a clock signal (C1) with a frequency higher than the frequency of the extracted clock signal, to be used as a sampling frequency for the respective data signals extracted from the other links (Li). 7. A process according to claim 3, characterized in that for the analog synchronization on reception, comprises: designating a master channel (L1) among all of the channels forming the link connecting each slave module (ME) to the master module (MM); extracting the clock signal sent by the module connected to the link from the data conveyed through the master channel (Li) and generating a clock signal (C1) with a frequency higher than the frequency of the extracted clock signal, to be used as a sampling frequency for the respective data signals extracted from the other links (Li). 8. A process according to claim 4, characterized in that for the analog synchronization on reception, comprises: designating a master channel (L1) among all of the channels forming the link connecting each slave module (ME) to the master module (MM); extracting the clock signal sent by the module connected to the link from the data conveyed through the master channel (Li); and generating a clock signal (C1) with a frequency higher than the frequency of the extracted clock signal, to be used as a sampling frequency for the respective data signals extracted from the other links (Li). 9. A process according to claim 1, characterized in that digital synchronization on reception, includes the step of digitally aligning, to the nearest bit, all of the starts-of-frame of the links to the starts-of-frame of the master link, at a given frequency corresponding to the throughput of the data conveyed through each of the links. 10. A process according to claim 2, characterized in that digital synchronization on reception, includes the step of digitally aligning, to the nearest bit, all of the starts-of-frame of the links to the starts-of-frame of the master link, at a given frequency corresponding to the throughput of the data conveyed through each of the links. 11. A process according to claim 3, characterized in that digital synchronization on reception, includes the step of digitally aligning, to the nearest bit, all of the starts-o
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