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An information providing apparatus includes a housing section for housing recording media including a plural kinds of recording media, which have at least any one of plural kinds of contents information recorded in advance. A content detector is also included for detecting a kind of content informat

An information providing apparatus includes a housing section for housing recording media including a plural kinds of recording media, which have at least any one of plural kinds of contents information recorded in advance. A content detector is also included for detecting a kind of content information required by a user. An ejecting portion ejects the kind of recording media in which the content information of the kind detected by the content detector is recorded. A remaining recording medium detector detects, for each kind of recording media, whether or not the remaining number of the kind of recording media housed in the housing section is less than or equal to a minimum threshold value. A replenishing device replenishes the recording media of the kind detected by the remaining recording medium detector to be less than or equal to the minimum threshold value.

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An information providing apparatus includes a housing section for housing recording media including a plural kinds of recording media, which have at least any one of plural kinds of contents information recorded in advance. A content detector is also included for detecting a kind of content informat

An information providing apparatus includes a housing section for housing recording media including a plural kinds of recording media, which have at least any one of plural kinds of contents information recorded in advance. A content detector is also included for detecting a kind of content information required by a user. An ejecting portion ejects the kind of recording media in which the content information of the kind detected by the content detector is recorded. A remaining recording medium detector detects, for each kind of recording media, whether or not the remaining number of the kind of recording media housed in the housing section is less than or equal to a minimum threshold value. A replenishing device replenishes the recording media of the kind detected by the remaining recording medium detector to be less than or equal to the minimum threshold value. the output of the variable reference voltage generating circuit to the gate of the current source transistor of each of the plurality of sense amplifier circuits. 3. The memory circuit of claim 1, further comprising: a total current selection circuit having a first signal representative of each of the plurality of bits stored in the non-volatile on-chip memory location; a second signal representative of each of a plurality of bits provided through at least one input/output pin of the memory circuit; and a selection control signal controlling a selection between the first and second signals as an output of the total current selection circuit. 4. The memory circuit of claim 2, further comprising: a total current selection circuit having as inputs a first signal representative of each of the plurality of bits stored in the non-volatile on-chip memory location, and a second signal representative of each of a plurality of bits provided through at least one input/output pin of the memory circuit; and a selection control signal controlling a selection between the first and second signals thereby providing an output of the total current selection circuit. 5. The memory circuit of claim 3, wherein the output of the total current selection circuit comprises a plurality of control bits each connected to control the selection transistor of a respective one of the plurality of variable current flow arms. 6. The memory circuit of claim 4, wherein the output of the total current selection circuit comprises a plurality of control bits each connected to control the selection transistor of a respective one of the plurality of variable current flow arms. 7. The memory circuit of claim 3, wherein each of the respective one of the plurality of variable current divider arms includes a current divider FET transistor having a source-to-drain current, wherein the source-to-drain current of each of the current divider FET transistor has a different integer fraction of a selected unit value of current. 8. The memory circuit of claim 4, wherein each of the respective one of the plurality of variable current divider arms includes a current divider FET transistor having a source-to-drain current, wherein the source-to-drain current of each of the current divider FET transistor has a different integer fraction of a selected unit value of current. 9. The memory circuit of claim 3, wherein the output of the total current selection circuit is latched in a latch having a plurality of positions each corresponding to a selected one of the plurality of control bits and each of the plurality of positions having an output connected to a switch in the respective one of the plurality of variable current flow arms. 10. The memory circuit of claim 4, wherein the output of the total current selection circuit is latched in a latch having a plurality of positions each corresponding to a selected one of the plurality of control bits and each of the plurality of positions having an output connected to a switch in the respective one of the plurality of variable current flow arms. 11. The memory circuit of claim 1, wherein the sense amplifier circuit current source transistor and the supply transistor are MOSFET transistors of the same channel type and construction having essentially a same threshold voltage and operating such that a same gate-to-source voltage passes a same amount of current. 12. The memory circuit of claim 2, wherein the sense amplifier circuit current source transistor and the supply transistor are MOSFET transistors of the same channel type and construction having essentially a same threshold voltage and operating such that a same gate-to-source voltage passes a same amount of current. 13. A memory circuit having: a sense amplifier circuit having a sensing amplifier connected to read a data content output of a memory cell, wherein the sense amplifier circuit includes a current source transistor having a gate and having a drain, the drain c