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Process for producing semiconductor article 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/30
  • H01L-021/46
출원번호 US-0634542 (2000-08-08)
우선권정보 JP-0354342 (1996-12-18)
발명자 / 주소
  • Sakaguchi, Kiyofumi
  • Yonehara, Takao
  • Nishida, Shoji
  • Yamagata, Kenji
출원인 / 주소
  • Canon Kabushiki Kaisha
대리인 / 주소
    Fitzpatrick, Cella, Harper & Scinto
인용정보 피인용 횟수 : 205  인용 특허 : 23

초록

A process for producing a semiconductor article is provided which comprises the steps of bonding a film onto a substrate having a porous semiconductor layer, and separating the film from the substrate at the porous semiconductor layer by applying a force to the film in a peeling direction.

대표청구항

1. A method for forming a semiconductor thin film which comprises steps of: implanting at least one kind of ion of a material selected from a group consisting of hydrogen, rare gases and nitrogen into a semiconductor substrate to define an ion-implanted layer and a semiconductor thin film on the

이 특허에 인용된 특허 (23)

  1. Sakaguchi Kiyofumi,JPX ; Yonehara Takao,JPX, Fabrication method for semiconductor substrate.
  2. Lin Paul T. (Austin TX) McShane Michael B. (Austin TX), Method for attaching conductive traces to plural, stacked, encapsulated semiconductor die using a removable transfer fil.
  3. Yonehara Takao,JPX, Method for bonding semiconductor substrates.
  4. Ogawa Tadashi,JPX ; Ishii Akihiro,JPX ; Nakayoshi Yuichi,JPX, Method for fabricating an SOI substrate.
  5. Milnes Arthur G. (Pittsburgh PA), Method for making thin film cadmium telluride and related semiconductors for solar cells.
  6. Sakaguchi Kiyofumi (c/o Canon Kabushiki Kaisha 30-2 ; 3-chome Shimomaruko ; Ohta-ku ; Tokyo JPX) Yonehara Takao (c/o Canon Kabushiki Kaisha 30-2 ; 3-chome Shimomaruko ; Ohta-ku ; Tokyo JPX) Nishida S, Method for producing semiconductor device substrate by bonding a porous layer and an amorphous layer.
  7. Sato Nobuhiko,JPX ; Yonehara Takao,JPX ; Sakaguchi Kiyofumi,JPX, Method for producing semiconductor substrate.
  8. Mori Kazuo,JPX, Method of bonding a III-V group compound semiconductor layer on a silicon substrate.
  9. Mori Kazuo,JPX, Method of bonding a III-V group compound semiconductor layer on a silicon substrate.
  10. Takahashi Kunihiro (Tokyo JPX) Kojima Yoshikazu (Tokyo JPX) Takasu Hiroaki (Tokyo JPX) Matsuyama Nobuyoshi (Tokyo JPX) Niwa Hitoshi (Tokyo JPX) Yoshino Tomoyuki (Tokyo JPX) Yamazaki Tsuneo (Tokyo JPX, Method of making light valve device using semiconductive composite substrate.
  11. Tanielian Minas (Schaumburg IL) Lajos Robert E. (Crystal Lake IL) Blackstone Scott (Mount Prospect IL), Method of making thin free standing single crystal films.
  12. Bozler Carl O. (Sudbury MA) Fan John C. C. (Chestnut Hill MA) McClelland Robert W. (Weymouth MA), Method of producing tandem solar cell devices from sheets of crystalline material.
  13. Hamamoto Satoshi (Itami JPX) DeGuchi Mikio (Itami JPX), Method of producing thin-film solar cell.
  14. Sullivan Gerard J. (Thousand Oaks CA) Szwed Mary K. (Huntington Beach CA) Chang Mau-Chung F. (Thousand Oaks CA), Method of transferring a thin film to an alternate substrate.
  15. Kondo Shigeki (Hiratsuka JPX) Matsumoto Shigeyuki (Atsugi JPX) Ishizaki Akira (Atsugi JPX) Inoue Shunsuke (Yokohama JPX) Nakamura Yoshio (Atsugi JPX), Process for preparing semiconductor substrate by bonding to a metallic surface.
  16. Yamagata Kenji (Kawasaki JPX) Yonehara Takao (Atsugi JPX), Process for producing a semiconductor substrate.
  17. Yamagata Kenji,JPX ; Yonehara Takao,JPX ; Sato Nobuhiko,JPX ; Sakaguchi Kiyofumi,JPX, Process for producing semiconductor substrate.
  18. Sato Nobuhiko,JPX ; Yonehara Takao,JPX ; Sakaguchi Kiyofumi,JPX, Process for producing semiconductor substrate by heat treating.
  19. Sato Nobuhiko,JPX ; Yonehara Takao,JPX ; Sakaguchi Kiyofumi,JPX, Process for producing semiconductor substrate by heating to flatten an unpolished surface.
  20. Bruel Michel,FRX, Process for the manufacture of thin films of semiconductor material.
  21. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.
  22. Yonehara Takao (Atsugi JPX) Yamagata Kenji (Kawasaki JPX), Process of making semiconductor-on-insulator substrate.
  23. Yonehara Takao,JPX ; Sato Nobuhiko,JPX ; Sakaguchi Kiyofumi,JPX ; Kondo Shigeki,JPX, Semiconductor member, and process for preparing same and semiconductor device formed by use of same.

이 특허를 인용한 특허 (205)

  1. Or-Bach, Zvi; Wurman, Ze'ev, 3D integrated circuit with logic.
  2. Sekar, Deepak C.; Or-Bach, Zvi; Cronquist, Brian, 3D memory semiconductor device and structure.
  3. Or-Bach, Zvi, 3D semiconductor device.
  4. Or-Bach, Zvi, 3D semiconductor device.
  5. Or-Bach, Zvi; Wurman, Zeev, 3D semiconductor device.
  6. Or-Bach, Zvi; Cronquist, Brian; Sekar, Deepak, 3D semiconductor device and structure.
  7. Or-Bach, Zvi; Cronquist, Brian; Sekar, Deepak, 3D semiconductor device and structure.
  8. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian, 3D semiconductor device and structure.
  9. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk, 3D semiconductor device and structure.
  10. Sekar, Deepak; Or-Bach, Zvi; Cronquist, Brian, 3D semiconductor device and structure.
  11. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian; Beinglass, Israel; Wurman, Ze'ev; Lim, Paul, 3D semiconductor device and structure with back-bias.
  12. Or-Bach, Zvi; Wurman, Ze'ev, 3D semiconductor device including field repairable logics.
  13. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian; Wurman, Zeev, 3D semiconductor device, fabrication method and system.
  14. Or-Bach, Zvi; Widjaja, Yuniarto, 3DIC system with a two stable state memory and back-bias region.
  15. Poo, Chia Yong; Jeung, Boon Suan; Waf, Low Siu; Yu, Chan Min; Loo, Neo Yong; Koon, Eng Meow; Leng, Ser Bok; Kwang, Chua Swee; Chung, So Chee; Seng, Ho Kwok, Apparatus and method for packaging circuits.
  16. Poo, Chia Yong; Jeung, Boon Suan; Waf, Low Siu; Yu, Chan Min; Lou, Neo Yong; Koon, Eng Meow; Leng, Ser Bok; Kwang, Chun Swee; Chung, So Chee; Song, Ho Kwok, Apparatus and method for packaging circuits.
  17. Poo, Chia Yong; Jeung, Boon Suan; Waf, Low Slu; Yu, Chan Min; Loo, Neo Yong; Koon, Eng Meow; Leng, Ser Bok; Kwang, Chua Swee; Chung, So Chee; Seng, Hu Kwok, Apparatus and method for packaging circuits.
  18. Khoury, Maroun Georges; Liu, Hongyue; Lee, Brian; Carter, Andrew John Gjevre, Apparatus for variable resistive memory punchthrough access method.
  19. Khoury, Maroun Georges; Liu, Hongyue; Lee, Brian; Carter, Andrew John Gjevre, Apparatus for variable resistive memory punchthrough access method.
  20. Jin, Insik; Tian, Wei; Vaithyanathan, Venugopalan; Bedoya, Cedric; Siegert, Markus, Asymmetric barrier diode.
  21. Or-Bach, Zvi; Wurman, Zeev, Automation for monolithic 3D devices.
  22. Lu, Yong; Liu, Hongyue; Khoury, Maroun; Chen, Yiran, Bipolar CMOS select device for resistive sense memory.
  23. Khoury, Maroun Georges, Bipolar select device for resistive sense memory.
  24. Khoury, Maroun Georges, Bipolar select device for resistive sense memory.
  25. Jung, Chulmin; Lu, Yong; Kim, Kang Yong; Kim, Young Pil, Bit line charge accumulation sensing for resistive changing memory.
  26. Jung, Chulmin; Lu, Yong; Kim, Kang Yong; Kim, Young Pil, Bit line charge accumulation sensing for resistive changing memory.
  27. Lee, Sang-Yun, Bonded semiconductor structure and method of fabricating the same.
  28. Lee, Sang-Yun, Bonded semiconductor structure and method of making the same.
  29. Hiliali, Mohamed M.; Herner, S. Brad, Creation and translation of low-relief texture for a photovoltaic cell.
  30. Li, Zhiyong; Tanner, David; Prabhu, Gopalakrishna; Hilali, Mohamed H., Creation of low-relief texture for a photovoltaic cell.
  31. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  32. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  33. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  34. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Gisèle, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  35. Tanaka, Koichiro; Okamoto, Satoru, Formation method of single crystal semiconductor layer, formation method of crystalline semiconductor layer, formation method of polycrystalline layer, and method for manufacturing semiconductor device.
  36. Lee, Sang-Yun, Information storage system which includes a bonded semiconductor structure.
  37. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian, Integrated circuit device and structure.
  38. Bressot,S챕verine; Rayssac,Olivier; Aspar,Bernard, Layer transfer method.
  39. de Souza, Joel P.; Fogel, Keith E.; Reznicek, Alexander; Schepis, Dominic J., Low defect III-V semiconductor template on porous silicon.
  40. Chen, Yiran; Li, Hai; Liu, Hongyue; Lu, Yong; Xue, Song S., MRAM diode array and access method.
  41. Chen, Yiran; Li, Hai; Liu, Hongyue; Lu, Yong; Xue, Song S., MRAM diode array and access method.
  42. Dairiki, Koji; Kusumoto, Naoto; Tsurume, Takuya, Manufacturing method of integrated circuit device including thin film transistor.
  43. Yamamoto,Masayuki; Ametani,Minoru, Method and apparatus for removing unwanted substance from semiconductor wafer.
  44. Or-Bach, Zvi; Wurman, Zeev, Method for design and manufacturing of a 3D semiconductor device.
  45. Or-Bach, Zvi, Method for developing a custom device.
  46. Kononchuk, Oleg, Method for fabricating a substrate and semiconductor structure.
  47. Or-Bach, Zvi; Sekar, Deepak C., Method for fabricating novel semiconductor and optoelectronic devices.
  48. Poo,Chia Yong; Jeung,Boon Suan; Waf,Low Siu; Yu,Chan Min; Loo,Neo Yong; Koon,Eng Meow; Leng,Ser Bok; Kwang,Chua Swee; Chung,So Chee; Seng,Ho Kwok, Method for fabricating packaged die.
  49. Cronquist, Brian; Beinglass, Isreal; de Jong, Jan Lodewijk; Sekar, Deepak C.; Or-Bach, Zvi, Method for fabrication of a semiconductor device and structure.
  50. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Isreal; de Jong, Jan Lodewijk; Sekar, Deepak C., Method for fabrication of a semiconductor device and structure.
  51. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian, Method for fabrication of a semiconductor device and structure.
  52. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk, Method for fabrication of a semiconductor device and structure.
  53. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk, Method for fabrication of a semiconductor device and structure.
  54. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk, Method for fabrication of a semiconductor device and structure.
  55. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian; Wurman, Ze'ev, Method for fabrication of a semiconductor device and structure.
  56. Sekar, Deepak; Or-Bach, Zvi; Cronquist, Brian, Method for fabrication of a semiconductor device and structure.
  57. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk, Method for fabrication of configurable systems.
  58. Redd, Randy D., Method for forming a semiconductor device.
  59. Murali, Venkatesan; Prabhu, Gopal; Dinan, Jr., Thomas Edward; Leland, Orion, Method for forming flexible solar cells.
  60. Jurczak, Malgorzata; Skotnicki, Thomas, Method for making a silicon substrate comprising a buried thin silicon oxide film.
  61. Jurczak, Malgorzata; Skotnicki, Thomas, Method for making a silicon substrate comprising a buried thin silicon oxide film.
  62. Yamazaki, Shunpei; Ohnuma, Hideto, Method for manufacturing SOI substrate and method for manufacturing semiconductor device.
  63. Lee, Hyun Kyu; Park, Yong In, Method for manufacturing array substrate for liquid crystal display device.
  64. Dairiki, Koji; Kusumoto, Naoto; Tsurume, Takuya, Method for manufacturing semiconductor device.
  65. Dairiki, Koji; Kusumoto, Naoto; Tsurume, Takuya, Method for manufacturing semiconductor device.
  66. Maruyama,Junya; Ohno,Yumiko; Takayama,Toru; Goto,Yuugo; Yamazaki,Shunpei, Method for manufacturing semiconductor device.
  67. Izumi, Konami; Yamaguchi, Mayumi, Method for manufacturing semiconductor device including microstructure.
  68. Asano, Akihiko; Kinoshita, Tomoatsu, Method for manufacturing thin film device and semiconductor device using a third substrate.
  69. Chia, Yong Poo; Waf, Low Siu; Boon, Suan Jeung; Koon, Eng Meow; Chua, Swee Kwang, Method for packaging circuits.
  70. Chia, Yong Poo; Waf, Low Siu; Boon, Suan Jeung; Koon, Eng Meow; Chua, Swee Kwang, Method for packaging circuits.
  71. Poo, Chia Y.; Waf, Low S.; Jeung, Boon S.; Koon, Eng M.; Kwang, Chua S., Method for packaging circuits.
  72. Chia, Yong Poo; Waf, Low Siu; Boon, Suan Jeung; Koon, Eng Meow; Chua, Swee Kwang, Method for packaging circuits and packaged circuits.
  73. Fujikura,Hajime; Iizuka,Kazuyuki, Method for producing nitride semiconductor crystal, and nitride semiconductor wafer and nitride semiconductor device.
  74. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian; Beinglass, Israel; Wurman, Ze'ev; Lim, Paul, Method of constructing a semiconductor device and structure.
  75. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Isreal; de Jong, Jan Lodewijk; Sekar, Deepak C., Method of fabricating a semiconductor device and structure.
  76. Faure, Bruce; Letertre, Fabrice; Ghyselen, Bruno, Method of fabricating heteroepitaxial microstructures.
  77. Chua,Swee Kwang; Boon,Suan Jeung; Chia,Yong Poo; Neo,Yong Loo, Method of forming a conductive via through a wafer.
  78. Yeo, Yee-Chia; Lee, Wen-Chin, Method of forming strained silicon on insulator substrate.
  79. Or-Bach, Zvi; Sekar, Deepak; Cronquist, Brian; Wurman, Ze'ev, Method of forming three dimensional integrated circuit devices using layer transfer technique.
  80. Or-Bach, Zvi; Widjaja, Yuniarto, Method of maintaining a memory state.
  81. Schwarzenbach,Walter; Maleville,Christophe, Method of making cavities in a semiconductor wafer.
  82. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian, Method of manufacturing a semiconductor device and structure.
  83. Sekar, Deepak C.; Or-Bach, Zvi, Method of manufacturing a semiconductor device with two monocrystalline layers.
  84. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Israel; de Jong, J. L.; Sekar, Deepak C.; Lim, Paul, Method of manufacturing a three dimensional integrated circuit by transfer of a mono-crystalline layer.
  85. Dairiki, Koji; Kusumoto, Naoto; Tsurume, Takuya, Method of manufacturing integrated circuit device.
  86. Takayama,Toru; Maruyama,Junya; Yamazaki,Shunpei, Method of peeling off and method of manufacturing semiconductor device.
  87. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Method of peeling thin film device and method of manufacturing semiconductor device using peeled thin film device.
  88. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Method of peeling thin film device and method of manufacturing semiconductor device using peeled thin film device.
  89. Or-Bach, Zvi; Cronquist, Brian; Sekar, Deepak, Method of processing a semiconductor device.
  90. Maruyama,Junya; Ohno,Yumiko; Takayama,Toru; Goto,Yuugo; Yamazaki,Shunpei, Method of separating a release layer from a substrate comprising hydrogen diffusion.
  91. Miyamoto,Saburo; Hase,Yukitoshi, Method of separating semiconductor wafer, and separating apparatus using the same.
  92. Aspar, Bernard, Method of transferring a circuit onto a ground plane.
  93. Takayama, Toru; Goto, Yuugo; Maruyama, Junya; Ohno, Yumiko, Method of transferring a laminate and method of manufacturing a semiconductor device.
  94. Takayama,Toru; Goto,Yuugo; Maruyama,Junya; Ohno,Yumiko, Method of transferring a laminate and method of manufacturing a semiconductor device.
  95. Or-Bach, Zvi; Wurman, Zeev, Method to construct a 3D semiconductor device.
  96. Or-Bach, Zvi; Wurman, Ze'ev, Method to construct systems.
  97. Or-Bach, Zvi; Wurman, Ze'ev, Method to form a 3D semiconductor device.
  98. Or-Bach, Zvi; Sekar, Deepak; Cronquist, Brian, Method to form a 3D semiconductor device and structure.
  99. Sivaram, Srinivasan; Agarwal, Aditya; Herner, S. Brad; Petti, Christopher J., Method to form a photovoltaic cell comprising a thin lamina.
  100. Sivaram, Srinivasan; Agarwal, Aditya; Herner, S. Brad; Petti, Christopher J., Method to form a photovoltaic cell comprising a thin lamina.
  101. Herner, S. Brad, Method to texture a lamina surface within a photovoltaic cell.
  102. Letertre,Fabrice; Ghyselen,Bruno, Methods for fabricating a substrate.
  103. Boussagol, Alice; Faure, Bruce; Ghyselen, Bruno; Letertre, Fabrice; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Gisèle, Methods for making substrates and substrates formed therefrom.
  104. Boussagol, Alice; Faure, Bruce; Ghyselen, Bruno; Letertre, Fabrice; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Giséle, Methods for making substrates and substrates formed therefrom.
  105. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk; Sekar, Deepak C., Monolithic three-dimensional semiconductor device and structure.
  106. Murali, Venkatesan; Dinan, Jr., Thomas Edward; Bababyan, Steve; Prabhu, Gopal, Multi-layer metal support.
  107. Lee, Hyung-Kyu; Kim, YoungPil; Manos, Peter Nicholas; Khoury, Maroun; Setiadi, Dadi; Jung, Chulmin; Liou, Hsing-Kuen; Subramanian, Paramasiyan Kamatchi; Ahn, Yongchul; Kim, Jinyoung; Khoueir, Antoine, Patterning embedded control lines for vertically stacked semiconductor elements.
  108. Lee, Hyung-Kyu; Kim, YoungPil; Manos, Peter Nicholas; Khoury, Maroun; Setiadi, Dadi; Jung, Chulmin; Liou, Hsing-Kuen; Subramanian, Paramasiyan Kamatchi; Ahn, Yongchul; Kim, Jinyoung; Khoueir, Antoine, Patterning embedded control lines for vertically stacked semiconductor elements.
  109. Takayama, Toru; Maruyama, Junya; Goto, Yuugo; Ohno, Yumiko; Tsurume, Takuya; Kuwabara, Hideaki, Peeling method.
  110. Takayama,Toru; Maruyama,Junya; Goto,Yuugo; Ohno,Yumiko; Tsurume,Takuya; Kuwabara,Hideaki, Peeling method.
  111. Takayama,Toru; Maruyama,Junya; Goto,Yuugo; Ohno,Yumiko; Tsurume,Takuya; Kuwabara,Hideaki, Peeling method.
  112. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Goto, Yuugo; Ohno, Yumiko, Peeling method and method for manufacturing display device using the peeling method.
  113. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Goto, Yuugo; Ohno, Yumiko, Peeling method and method for manufacturing display device using the peeling method.
  114. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Goto, Yuugo; Ohno, Yumiko, Peeling method and method for manufacturing display device using the peeling method.
  115. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Goto, Yuugo; Ohno, Yumiko, Peeling method and method for manufacturing display device using the peeling method.
  116. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Goto, Yuugo; Ohno, Yumiko, Peeling method and method for manufacturing display device using the peeling method.
  117. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Goto, Yuugo; Ohno, Yumiko, Peeling method and method for manufacturing display device using the peeling method.
  118. Yamazaki,Shunpei; Takayama,Toru; Maruyama,Junya; Goto,Yuugo; Ohno,Yumiko, Peeling method and method for manufacturing display device using the peeling method.
  119. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.
  120. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.
  121. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.
  122. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.
  123. Takayama,Toru; Maruyama,Junya; Yamazaki,Shunpei, Peeling method and method of manufacturing semiconductor device.
  124. Yamazaki, Shunpei; Suzuki, Kunihiko, Peeling method and peeling apparatus.
  125. Yasumoto, Seiji; Sato, Masataka; Eguchi, Shingo; Suzuki, Kunihiko, Peeling method, semiconductor device, and peeling apparatus.
  126. Yamazaki, Shunpei; Shimomura, Akihisa, Photoelectric conversion device and method for manufacturing the same.
  127. Hilali, Mohamed M.; Petti, Christopher J., Photovoltaic cell comprising a thin lamina having low base resistivity and method of making.
  128. Jung, Chulmin; Khoury, Maroun Georges; Lu, Yong; Kim, Young Pil, Polarity dependent switch for resistive sense memory.
  129. Ghyselen,Bruno; Rayssac,Olivier, Preventive treatment method for a multilayer semiconductor structure.
  130. Yeo, Yee-Chia; Hu, Chenming, SOI chip with recess-resistant buried insulator and method of manufacturing the same.
  131. Yeo,Yee Chia; Hu,Chenming, SOI chip with recess-resistant buried insulator and method of manufacturing the same.
  132. Kim, Young Pil; Amin, Nurul; Setiadi, Dadi; Vaithyanathan, Venugopalan; Tian, Wei; Jin, Insik, Schottky diode switch and memory units containing the same.
  133. Kim, Young Pil; Amin, Nurul; Setiadi, Dadi; Vaithyanathan, Venugopalan; Tian, Wei; Jin, Insik, Schottky diode switch and memory units containing the same.
  134. Kim, Young Pil; Amin, Nurul; Setiadi, Dadi; Vaithyanathan, Venugopalan; Tian, Wei; Jin, Insik, Schottky diode switch and memory units containing the same.
  135. Sekar, Deepak C.; Or-Bach, Zvi, Self aligned semiconductor device and structure.
  136. Or-Bach, Zvi; Lim, Paul; Sekar, Deepak C., Semiconductor and optoelectronic devices.
  137. Or-Bach, Zvi; Sekar, Deepak, Semiconductor and optoelectronic devices.
  138. Or-Bach, Zvi; Sekar, Deepak C., Semiconductor and optoelectronic devices.
  139. Okagawa,Hiroaki; Tadatomo,Kazuyuki; Ouchi,Yoichiro; Tsunekawa,Takashi, Semiconductor base material and method of manufacturing the material.
  140. Oh, ChoonSik; Sang-Yun, Lee, Semiconductor circuit and method of fabricating the same.
  141. Lee, Sang-Yun, Semiconductor circuit structure and method of forming the same using a capping layer.
  142. Lee, Sang-Yun, Semiconductor circuit structure and method of making the same.
  143. Maruyama, Junya; Takayama, Toru; Ohno, Yumiko; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof, delamination method, and transferring method.
  144. Maruyama, Junya; Takayama, Toru; Ohno, Yumiko; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof, delamination method, and transferring method.
  145. Maruyama, Junya; Takayama, Toru; Ohno, Yumiko; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof, delamination method, and transferring method.
  146. Maruyama, Junya; Takayama, Toru; Ohno, Yumiko; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof, delamination method, and transferring method.
  147. Maruyama, Junya; Takayama, Toru; Ohno, Yumiko; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof, delamination method, and transferring method.
  148. Maruyama, Junya; Takayama, Toru; Ohno, Yumiko; Yamazaki, Shunpei, Semiconductor device and manufacturing method thereof, delamination method, and transferring method.
  149. Takayama, Toru; Maruyama, Junya; Mizukami, Mayumi; Yamazaki, Shunpei, Semiconductor device and peeling off method and method of manufacturing semiconductor device.
  150. Takayama, Toru; Maruyama, Junya; Mizukami, Mayumi; Yamazaki, Shunpei, Semiconductor device and peeling off method and method of manufacturing semiconductor device.
  151. Takayama, Toru; Maruyama, Junya; Mizukami, Mayumi; Yamazaki, Shunpei, Semiconductor device and peeling off method and method of manufacturing semiconductor device.
  152. Takayama, Toru; Maruyama, Junya; Mizukami, Mayumi; Yamazaki, Shunpei, Semiconductor device and peeling off method and method of manufacturing semiconductor device.
  153. Or-Bach, Zvi, Semiconductor device and structure.
  154. Or-Bach, Zvi, Semiconductor device and structure.
  155. Or-Bach, Zvi; Cronquist, Brian, Semiconductor device and structure.
  156. Or-Bach, Zvi; Cronquist, Brian, Semiconductor device and structure.
  157. Or-Bach, Zvi; Cronquist, Brian, Semiconductor device and structure.
  158. Or-Bach, Zvi; Cronquist, Brian, Semiconductor device and structure.
  159. Or-Bach, Zvi; Cronquist, Brian, Semiconductor device and structure.
  160. Or-Bach, Zvi; Cronquist, Brian, Semiconductor device and structure.
  161. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk; Sekar, Deepak C., Semiconductor device and structure.
  162. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk; Sekar, Deepak C.; Lim, Paul, Semiconductor device and structure.
  163. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk; Sekar, Deepak C.; Wurman, Zeev, Semiconductor device and structure.
  164. Or-Bach, Zvi; Cronquist, Brian; Sekar, Deepak, Semiconductor device and structure.
  165. Or-Bach, Zvi; Cronquist, Brian; Sekar, Deepak, Semiconductor device and structure.
  166. Or-Bach, Zvi; Cronquist, Brian; Sekar, Deepak, Semiconductor device and structure.
  167. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian, Semiconductor device and structure.
  168. Or-Bach, Zvi; Sekar, Deepak; Cronquist, Brian, Semiconductor device and structure.
  169. Or-Bach, Zvi; Sekar, Deepak; Cronquist, Brian, Semiconductor device and structure.
  170. Or-Bach, Zvi; Sekar, Deepak; Cronquist, Brian; Lim, Paul, Semiconductor device and structure.
  171. Or-Bach, Zvi; Widjaja, Yuniarto; Sekar, Deepak C., Semiconductor device and structure.
  172. Or-Bach, Zvi; Wurman, Zeev, Semiconductor device and structure.
  173. Sekar, Deepak C.; Or-Bach, Zvi, Semiconductor device and structure.
  174. Sekar, Deepak C.; Or-Bach, Zvi, Semiconductor device and structure.
  175. Sekar, Deepak C; Or-Bach, Zvi; Lim, Paul, Semiconductor device and structure.
  176. Sekar, Deepak; Or-Bach, Zvi; Cronquist, Brian, Semiconductor device and structure.
  177. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian, Semiconductor device and structure for heat removal.
  178. Sekar, Deepak C.; Or-Bach, Zvi; Cronquist, Brian, Semiconductor device and structure for heat removal.
  179. Sekar, Deepak; Or-Bach, Zvi; Cronquist, Brian, Semiconductor device and structure for heat removal.
  180. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian, Semiconductor devices and structures.
  181. Or-Bach, Zvi; Wurman, Zeev, Semiconductor devices and structures.
  182. Lee, Sang-Yun, Semiconductor memory device.
  183. Lee, Sang-Yun, Semiconductor memory device.
  184. Lee, Sang-Yun, Semiconductor memory device and method of fabricating the same.
  185. Or-Bach, Zvi; Sekar, Deepak C.; Cronquist, Brian; Wurman, Zeev, Semiconductor system and device.
  186. Or-Bach, Zvi; Sekar, Deepak; Cronquist, Brian; Wurman, Ze'ev, Semiconductor system and device.
  187. Sekar, Deepak; Or-Bach, Zvi; Cronquist, Brian, Semiconductor system, device and structure with heat removal.
  188. Murali, Venkatesan; Babayan, Steve; Petti, Christopher J., Silicon carbide lamina.
  189. Yeo, Yee-Chia; Yang, Fu-Liang, Silicon-on-insulator chip with multiple crystal orientations.
  190. Yeo,Yee Chia; Yang,Fu Liang, Silicon-on-insulator chip with multiple crystal orientations.
  191. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Israel; de Jong, J. L.; Sekar, Deepak C., System comprising a semiconductor device and structure.
  192. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk; Sekar, Deepak C.; Wurman, Zeev, System comprising a semiconductor device and structure.
  193. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk; Sekar, Deepak C.; Wurman, Zeev, System comprising a semiconductor device and structure.
  194. Or-Bach, Zvi; Cronquist, Brian; Beinglass, Israel; de Jong, Jan Lodewijk; Sekar, Deepak C.; Wurman, Zeev, System comprising a semiconductor device and structure.
  195. Lee, Sang-Yun, Three-dimensional integrated circuit structure.
  196. Chen, Yiran; Li, Hai; Liu, Hongyue; Lu, Yong; Li, Yang, Transmission gate-based spin-transfer torque memory unit.
  197. Chen, Yiran; Li, Hai; Liu, Hongyue; Lu, Yong; Li, Yang, Transmission gate-based spin-transfer torque memory unit.
  198. Chen, Yiran; Li, Hai; Liu, Hongyue; Lu, Yong; Li, Yang, Transmission gate-based spin-transfer torque memory unit.
  199. Jin, Insik; Tian, Wei; Vaithyanathan, Venugopalan; Bedoya, Cedric; Siegert, Markus, Tunneling transistors.
  200. Khoury, Maroun Georges; Liu, Hongyue; Lee, Brian; Carter, Andrew John Gjevre, Variable resistive memory punchthrough access method.
  201. Kim, Young Pil; Lee, Hyung-Kew; Manos, Peter Nicholas; Jung, Chulmin; Khoury, Maroun Georges; Setiadi, Dadi, Vertical transistor with hardening implatation.
  202. Lee, Sang Yun, Wafer bonding method.
  203. Chua, Swee Kwang; Boon, Suan Jeung; Chia, Yong Poo; Loo, Neo Yong, Wafer level packaging.
  204. Chua, Swee Kwang; Boon, Suan Jeung; Chia, Yong Poo; Neo, Yong Loo, Wafer level packaging.
  205. Akatsu,Takeshi; Ghyselen,Bruno, Wafer with a relaxed useful layer and method of forming the wafer.
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