IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
|
출원번호 |
US-0933530
(2001-08-20)
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발명자
/ 주소 |
- Welland, David R.
- Wang, Caiyi
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출원인 / 주소 |
- Silicon Laboratories, Inc.
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대리인 / 주소 |
O'Keefe, Egan & Peterman, LLP
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인용정보 |
피인용 횟수 :
19 인용 특허 :
80 |
초록
▼
A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuous
A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. During fine tuning adjustment, the PLL may be controlled by a plurality of analog control signals. The analog control signals may be derived by first generating a plurality of phase shifted signals from a divided version of the VCO output clock. Second, the phase differences between the plurality of phase shifted signals and a divided version of a reference clock may be detected and then converted to the analog control signals.
대표청구항
▼
A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuous
A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. During fine tuning adjustment, the PLL may be controlled by a plurality of analog control signals. The analog control signals may be derived by first generating a plurality of phase shifted signals from a divided version of the VCO output clock. Second, the phase differences between the plurality of phase shifted signals and a divided version of a reference clock may be detected and then converted to the analog control signals. 9860600, Koyanagi; US-4598288, 19860700, Yarbrough et al.; US-4605973, 19860800, Von Kohorn; US-4621259, 19861100, Schepers et al.; US-4623887, 19861100, Welles, II; US-4625080, 19861100, Scott; US-4631601, 19861200, Brugliera et al.; US-4635121, 19870100, Hoffman et al.; US-4638359, 19870100, Watson; US-4641205, 19870200, Beyers, Jr.; US-4703359, 19871000, Rumbolt et al.; US-4706121, 19871100, Young; US-4718112, 19880100, Shinoda; US-4751578, 19880600, Reiter et al.; US-4755883, 19880700, Uehira; US-4771283, 19880900, Imoto; US-4807031, 19890200, Broughton et al.; US-4825200, 19890400, Evans et al.; US-4841368, 19890600, Rumbolt et al.; US-4843482, 19890600, Hegendorfer; US-4866434, 19890900, Keenan; US-4885579, 19891200, Sandbank; US-4899370, 19900200, Kameo et al.; US-4998292, 19910300, Eigeldinger et al.; US-5081534, 19920100, Geiger et al.; US-5151789, 19920900, Young; US-5303063, 19940400, Kim et al.; US-5307173, 19940400, Yuen et al.; US-5748716, 19980500, Levine the 8-level VSB modulated signal, and a VSB demodulator operable to demodulate the n-level VSB modulated signal to the first data stream and demodulating the 8-level VSB modulated signal to the second data stream, wherein n is an integer and n is less than 8. 4. A signal transmission method for transmitting a plurality of data streams, including at least a first data stream and a second data stream, said signal transmission method comprising: modulating the first data stream to an n-level VSB modulated signal and the second data stream to an 8-level VSB modulated signal, wherein n is an integer and n is less than 8, and transmitting the n-level VSB modulated signal and the 8-level VSB modulated signal under a condition where the transmission power of the n-level VSB modulated signal is larger than the transmission power of the 8-level VSB modulated signal. 5. A signal receiving method for reconstructing a plurality of data streams including at least a first data stream and a second data stream, said signal receiving method comprising: receiving an n-level VSB modulated signal and an 8-level VSB modulated signal under a condition where the transmission power of the n-level VSB modulated signal is larger than the transmission power of the 8-level VSB modulated signal, and demodulating the n-level VSB modulated signal to the first data stream and demodulating the 8-level VSB modulated signal to the second data stream, wherein n is an integer and n is less the 8. 6. A signal transmission and receiving method comprising: a signal transmission method for transmitting a plurality of data streams, including at least a first data stream and a second data stream, said signal transmission method comprising modulating the first data stream to an n-level VSB modulated signal and the second data stream to an 8-level VSB modulated signal, wherein n is an integer and n is less than 8, and transmitting the n-level VSB modulated signal and the 8-level VSB modulated signal under a condition where the transmission power of the n-level VSB modulated signal is larger than the transmission power of the 8-level VSB modulated signal; and a signal receiving method for reconstructing the plurality of data streams including at least the first data stream and the second data stream, said signal receiving method comprising receiving the n-level VSB modulated signal and the 8-level VSB modulated signal under a condition where the transmission power of the n-level VSB modulated signal is larger than the transmission power of the 8-level VSB modulated signal, and demodulating the n-level VSB modulated signal to the first data stream and demodulating the 8-level VSB modulated signal to the second data stream, wherein n is an integer and n is less then 8. 7. A signal transmission apparatus for transmitting a plurality of data streams, including at least a first data stream and a second data stream, said signal transmission apparatus comprising: an ASK modulator operable to modulate the first data stream to an n-level ASK modulated signal and the second data stream to an 8-level ASK modulated signal, wherein n is an integer and n is less than 8, a filter operable to filter the n-level ASK modulated signal and the 8-level ASK modulated signal to produce an n-level VSB modulated signal and an 8-level VSB modulated signal; and a transmitter operable to transmit the n-level VSB modulated signal and the 8-level VSB modulated signal under a condition where the transmission power of the n-level VSB modulated signal is larger than the transmission power of the 8-level VSB modulated signal. 8. A signal receiving apparatus for reconstructing a plurality of data streams including at least a first data stream and a second data stream, said signal receiving apparatus comprising: a receiving unit operable to receive an n-level VSB modulated signal and an 8-level VSB modulated signal under a condition where the transmission power of the
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