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METHOD FOR STORING A TEMPERATURE THRESHOLD IN AN INTEGRATED CIRCUIT, METHOD FOR STORING A TEMPERATURE THRESHOLD IN A DYNAMIC RANDOM ACCESS MEMORY, METHOD OF MODIFYING DYNAMIC RANDOM ACCESS MEMORY OPE 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G11C-007/04
출원번호 US-0768897 (2001-01-23)
발명자 / 주소
  • Cooper, Christopher B.
  • Liu, Ming-Bo
  • Martin, Chris G.
  • Manning, Troy A.
  • Casper, Stephen L.
  • Dennison, Charles H.
  • Shirley, Brian M.
  • Brown, Brian L.
  • Batra, Shubneesh
출원인 / 주소
  • Micron Technology, Inc.
대리인 / 주소
    Wells St. John P.S.
인용정보 피인용 횟수 : 14  인용 특허 : 22

초록

A method for storing a temperature threshold in an integrated circuit includes measuring operating parameters of the integrated circuit versus temperature, calculating a maximum temperature at which the integrated circuit performance exceeds predetermined specifications and storing parameters corres

대표청구항

A method for storing a temperature threshold in an integrated circuit includes measuring operating parameters of the integrated circuit versus temperature, calculating a maximum temperature at which the integrated circuit performance exceeds predetermined specifications and storing parameters corres

이 특허에 인용된 특허 (22)

  1. Casper Stephen L., Antifuse detect circuit.
  2. Woo Steven C. ; Satagopan Ramprasad ; Barth Richard M. ; Tsern Ely K. ; Hampel Craig E., Apparatus and method for thermal regulation in memory subsystems.
  3. Gantioler Josef-Matthias (Munich DEX) Heil Holger (Munich DEX) Tihanyi Jenoe (Kirchheim DEX), Circuit configuration for monitoring the temperature of a power semiconductor component.
  4. Tillinghast Charles W. (Boise ID) Cohen Michael S. (Boise ID) Voshell Thomas W. (Boise ID), Dynamic RAM array for emulating a static RAM array.
  5. Zommer Nathan (Palo Alto CA), High power transistor with voltage, current, power, resistance, and temperature sensing capability.
  6. Curiger Andreas ; Little Wendell L., Integrated circuit having hardware circuitry to prevent electrical or thermal stressing of the silicon circuitry.
  7. Chevallier Christophe J., Integrated circuit with temperature detector.
  8. Bertoluzzi Renitia J. (Saratoga CA) Jackson Robert T. (Boynton Beach FL) Weitzel Stephen D. (Boca Raton FL), Integrated dynamic power dissipation control system for very large scale integrated (VLSI) chips.
  9. Yamaguchi Kazumi (Tokyo JPX) Sawada Masami (Tokyo JPX) Yamada Manabu (Tokyo JPX) Hagimoto Keizo (Tokyo JPX), Integrated semiconductor device with temperature sensing circuit and method for operating same.
  10. Seyyedy Mirmajid ; Ma Manny K. F., Laser antifuse using gate capacitor.
  11. Manning Monte, MOS diode for use in a non-volatile memory cell.
  12. Hoff David L. (Fair Oaks CA), MOS temperature sensing circuit.
  13. Cooper Christopher B. ; Liu Ming-Bo ; Martin Chris G. ; Manning Troy A. ; Casper Stephen L. ; Dennison Charles H. ; Shirley Brian M. ; Brown Brian L. ; Batra Shubneesh, Method of storing a temperature threshold in an integrated circuit, method of modifying operation of dynamic random access memory in response to temperature, programmable temperature sensing circuit .
  14. Neely Andrew (Phoenixville PA) Fussell Richard L. (Berwyn PA), On chip noise tolerant temperature sensing circuit.
  15. Pricer Wilbur D. ; Noble Wendell P. ; Fifield John A. ; Gersbach John E., On-chip thermometry for control of chip operating temperature.
  16. Moyer James C. (San Jose CA) Sample Lawrence R. (San Jose CA) Wolbert Robert P. (San Jose CA), PCMCIA power multiplexer integrated circuit with programmable decode.
  17. Shirley Brian, Programmable device for redundant element cancel in a memory.
  18. Eto Satoshi,JPX, Semiconductor memory having self-refresh function.
  19. Loughmiller Daniel R. ; Duesman Kevin G., System and method for an antifuse bank.
  20. Hirano Hiroshige (Nara JPX), Temperature detecting circuit and dynamic random access memory device.
  21. Tillinghast Charles W. (Boise ID) Cohen Michael S. (Boise ID) Voshell Thomas W. (Boise ID), Temperature-dependent DRAM refresh circuit.
  22. Sher Joseph C., Voltage generator for antifuse programming.

이 특허를 인용한 특허 (14)

  1. Trivedi, Romesh B.; Rajappa, Srinivasan, Glitch detection circuit for outputting a signal indicative of a glitch on a strobe signal and initializing an edge detection circuit in response to a control signal.
  2. Erez, Eran, Memory system and method for power management for reducing a variable credit value by a computed consumed energy value for each corresponding updated cycle.
  3. Franch, Robert L.; Jenkins, Keith A., On chip temperature measuring and monitoring circuit and method.
  4. Franch, Robert L.; Jenkins, Keith A., On chip temperature measuring and monitoring method.
  5. Ho, Sheng Feng, Protection apparatus and method for protecting electronic system using the same.
  6. Ping, Zhan, Semiconductor energy harvest and storage system for charging an energy storage device and powering a controller and multi-sensor memory module.
  7. Choi,Jung Yong; Kang,Young Gu; Jang,Ki Ho, Semiconductor memory device having self refresh mode and related method of operation.
  8. Amir, Nir; Vishne, Gadi; Lehmann, Joshua; Hahn, Judah, Storage system and method for adaptive thermal throttling.
  9. Amir, Nir; Vishne, Gadi; Lehmann, Joshua; Hahn, Judah, Storage system and method for adaptive thermal throttling.
  10. Choi,Joo S., System and method for communicating information to a memory device using a reconfigured device pin.
  11. Choi,Joo S., System and method for communicating information to a memory device using a reconfigured device pin.
  12. Shirley, Paul; Haller, Gordon, System for two-step resist soft bake to prevent ILD outgassing during semiconductor processing.
  13. Rangarajan, Madhusudhan; Wynn, Allen Chester, Thermal control of memory modules using proximity information.
  14. Rangarajan,Madhusudhan; Wynn,Allen Chester, Thermal control of memory modules using proximity information.
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