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[미국특허] Siloxan polymer film on semiconductor substrate 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/58
출원번호 US-0133419 (2002-04-25)
우선권정보 JP-0037929 (1998-02-05)
발명자 / 주소
  • Matsuki, Nobuo
  • Sik, Lee Jea
  • Morisada, Yoshinori
  • Takahashi, Satoshi
출원인 / 주소
  • ASM Japan K.K.
대리인 / 주소
    Knobbe, Martens Olson & Bear, LLP
인용정보 피인용 횟수 : 44  인용 특허 : 10

초록

A siloxan polymer insulation film has a dielectric constant of 3.1 or lower and has --SiR2O-- repeating structural units with a C atom concentration of 20% or less. The siloxan polymer also has high thermal stability and high humidity-resistance. The siloxan polymer is formed by directly vaporizing

대표청구항

1. A siloxan polymer insulation film formed on a semiconductor substrate, obtainable by a method comprising the steps of: vaporizing a silicon-containing hydrocarbon compound to produce a material gas for siloxan polymer, said silicon-containing hydrocarbon having the formula SiαOα-1R2α-β+2(OCnH2

이 특허에 인용된 특허 (10) 인용/피인용 타임라인 분석

  1. Hu Ing-Feng (Midland MI) Tou James C. (Midland MI), Apparatus for plasma enhanced chemical vapor deposition comprising shower head electrode with magnet disposed therein.
  2. Hentz Christopher A., Jewelry clasp.
  3. Lee Chung J. ; Wang Hui ; Foggiato Giovanni Antonio, Low dielectric constant materials and method.
  4. Yau Wai-Fan ; Cheung David ; Jeng Shin-Puu ; Liu Kuowei ; Yu Yung-Cheng, Method of depositing a low k dielectric with organo silane.
  5. Hu Ing-Feng (Midland MI) Tou James C. (Midland MI), Method of forming a plasma polymerized film.
  6. Maeda Kazuo (Tokyo JPX) Tokumasu Noboru (Tokyo JPX) Yuyama Yoshiaki (Tokyo JPX), Method of forming insulating film.
  7. Sugahara Gaku,JPX ; Aoi Nobuo,JPX ; Arai Koji,JPX ; Sawada Kazuyuki,JPX, Method of forming interlayer insulating film.
  8. Mine Katsutoshi (Chiba JPX) Nakamura Takashi (Chiba JPX) Sasaki Motoshi (Chiba JPX), Methods for the formation of a silicon oxide film.
  9. Tsukune Atuhiro (Kawasaki JPX) Furumura Yuji (Kawasaki JPX) Masanobu Hatanaka (Kawasaki JPX), Process for forming silicon oxide film.
  10. Hayase Shuzi,JPX ; Nakano Yoshihiko,JPX ; Kani Rikako,JPX ; Ito Mao,JPX ; Mikoshiba Satoshi,JPX ; Okino Takeshi,JPX ; Fujioka Sawako,JPX, Silicone polymer composition, method of forming a pattern and method of forming an insulating film.

이 특허를 인용한 특허 (44) 인용/피인용 타임라인 분석

  1. Li,Lihua; Huang,Tzu Fang; Sugiarto, legal representative,Jerry; Xia,Li Qun; Lee,Peter Wai Man; M'Saad,Hichem; Cui,Zhenjiang; Park,Sohyun; Sugiarto, deceased,Dian, Adhesion improvement for low k dielectrics.
  2. Li,Lihua; Huang,Tzu Fang; Sugiarto, legal representative,Jerry; Xia,Li Qun; Lee,Peter Wai Man; M'Saad,Hichem; Cui,Zhenjiang; Park,Sohyun; Sugiarto,Dian, Adhesion improvement for low k dielectrics.
  3. Law,Kam; Shang,Quanyuan; Harshbarger,William Reid; Maydan,Dan, Deposition of silicon layers for active matrix liquid crystal display (AMLCD) applications.
  4. Zojaji, Ali; Samoilov, Arkadii V., Etchant treatment processes for substrate surfaces and chamber surfaces.
  5. Zojaji, Ali; Samoilov, Arkadii V., Etchant treatment processes for substrate surfaces and chamber surfaces.
  6. Ishikawa, David; Metzner, Craig R.; Zojaji, Ali; Kim, Yihwan; Samoilov, Arkadii V., Gas manifolds for use during epitaxial film formation.
  7. Ma, Yi; Ahmed, Khaled Z.; Cunningham, Kevin L.; McIntosh, Robert C.; Mayur, Abhilash J.; Liang, Haifan; Yam, Mark; Leung, Toi Yue Becky; Olsen, Christopher; Wang, Shulin; Foad, Majeed; Miner, Gary Eugene, Gate electrode dopant activation method for semiconductor manufacturing.
  8. Ma,Yi; Ahmed,Khaled Z.; Cunningham,Kevin L.; McIntosh,Robert C.; Mayur,Abhilash J.; Liang,Haifan; Yam,Mark; Leung,Toi Yue Becky; Olsen,Christopher; Wang,Shulin; Foad,Majeed; Miner,Gary Eugene, Gate electrode dopant activation method for semiconductor manufacturing including a laser anneal.
  9. Yim, Kang Sub; Tam, Melissa M.; Sugiarto, Dian; Lang, Chi-I; Lee, Peter Wai-Man; Xia, Li-Qun, Low dielectric (low k) barrier films with oxygen doping by plasma-enhanced chemical vapor deposition (PECVD).
  10. Yim,Kang Sub; Tam,Melissa M.; Sugiarto,Dian; Lang,Chi I; Lee,Peter Wai Man; Xia,Li Qun, Low dielectric (low k) barrier films with oxygen doping by plasma-enhanced chemical vapor deposition (PECVD).
  11. Yim,Kang Sub; Tam,Melissa M.; Sugiarto,Dian; Lang,Chi I; Lee,Peter Wai Man; Xia,Li Qun, Low dielectric (low k) barrier films with oxygen doping by plasma-enhanced chemical vapor deposition (PECVD).
  12. Hong, Sukwon; Tran, Toan; Mallick, Abhijit; Liang, Jingmei; Ingle, Nitin K., Low shrinkage dielectric films.
  13. Samoilov, Arkadii, Low temperature etchant for treatment of silicon-containing surfaces.
  14. Samoilov,Arkadii V., Low temperature etchant for treatment of silicon-containing surfaces.
  15. Kim, Jae-Hak; Lee, Soo-Geun; Park, Wan-Jae; Lee, Kyoung-Woo, Method for forming a dual damascene wiring pattern in a semiconductor device.
  16. Fukazawa, Atsuki; Kagami, Kenichi, Method for forming insulation film.
  17. Ohto, Koichi; Usami, Tatsuya; Morita, Noboru; Ohnishi, Sadayuki; Arita, Koji; Kitao, Ryohei; Sasaki, Yoichi, Method for manufacturing a semiconductor device having a multi-layered insulating structure of SiOCH layers and an SiOlayer.
  18. Lee, Ju-Hyung; Xu, Ping; Venkataraman, Shankar; Xia, Li-Qun; Han, Fei; Yieh, Ellie; Nemani, Srinivas D.; Yim, Kangsub; Moghadam, Farhad K.; Sinha, Ashok K.; Zheng, Yi, Method of depositing dielectric materials in damascene applications.
  19. Lee,Ju Hyung; Xu,Ping; Venkataraman,Shankar; Xia,Li Qun; Han,Fei; Yieh,Ellie; Nemani,Srinivas D.; Yim,Kangsub; Moghadam,Farhad K.; Sinha,Ashok K.; Zheng,Yi, Method of depositing dielectric materials including oxygen-doped silicon carbide in damascene applications.
  20. Huang, Tzu-Fang; Lu, Yung-Cheng; Xia, Li-Qun; Yieh, Ellie; Yau, Wai-Fan; Cheung, David W.; Willecke, Ralf B.; Liu, Kuowei; Lee, Ju-Hyung; Moghadam, Farhad K.; Ma, Yeming Jim, Method of depositing low K films.
  21. Lee,Kyoung woo; Maeng,Jae yeol; Kim,Jae hak; Oh,Il whan; Shin,Hong jae, Method of fabricating dual damascene interconnections of microelectronic device using diffusion barrier layer against base material.
  22. Lee,Kyoung woo; Lee,Soo geun; Park,Wan jae; Kim,Jae hak; Shin,Hong jae, Method of fabricating dual damascene interconnections of microelectronic device using hybrid low k-dielectric and carbon-free inorganic filler.
  23. Lee, Soo-geun; Shin, Hong-jae; Lee, Kyoung-woo; Kim, Jae-hak, Method of manufacturing interconnection line in semiconductor device.
  24. Huang, Yi-Chiau; Ishii, Masato; Sanchez, Errol, Methods for forming silicon germanium layers.
  25. Kim, Yihwan; Lam, Andrew M., Methods of controlling morphology during epitaxial layer formation.
  26. Kim, Yihwan; Ye, Zhiyuan; Zojaji, Ali, Methods of forming carbon-containing silicon epitaxial layers.
  27. Kim, Yihwan; Samoilov, Arkadii V., Methods of selective deposition of heavily doped epitaxial SiGe.
  28. Kim,Yihwan; Samoilov,Arkadii V., Methods of selective deposition of heavily doped epitaxial SiGe.
  29. Samoilov,Arkadii V.; Kim,Yihwan; Sanchez,Errol; Dalida,Nicholas C., Methods to fabricate MOSFET devices using a selective deposition process.
  30. Samoilov,Arkadii V.; Kim,Yihwan; Sanchez,Errol; Dalida,Nicholas C., Methods to fabricate MOSFET devices using selective deposition process.
  31. Cheung, David; Yau, Wai Fan; Mandal, Robert P.; Jeng, Shin Puu; Liu, Kuo Wei; Lu, Yung Cheng; Barnes, Michael; Willecke, Ralf B.; Moghadam, Farhad; Ishikawa, Tetsuya; Poon, Tze Wing, Plasma processes for depositing low dielectric constant films.
  32. Cheung, David; Yau, Wai-Fan; Mandal, Robert P.; Jeng, Shin-Puu; Liu, Kuo-Wei; Lu, Yung-Cheng; Barnes, Michael; Willecke, Ralf B.; Moghadam, Farhad; Ishikawa, Tetsuya; Poon, Tze Wing, Plasma processes for depositing low dielectric constant films.
  33. Cheung, David; Yau, Wai-Fan; Mandal, Robert P.; Jeng, Shin-Puu; Liu, Kuo-Wei; Lu, Yung-Cheng; Barnes, Michael; Willecke, Ralf B.; Moghadam, Farhad; Ishikawa, Tetsuya; Poon, Tze Wing, Plasma processes for depositing low dielectric constant films.
  34. Carlson, David K.; Kuppurao, Satheesh; Sanchez, Errol Antonio C.; Beckford, Howard; Kim, Yihwan, Selective deposition.
  35. Kim, Yihwan; Samoilov, Arkadii V., Selective epitaxy process with alternating gas supply.
  36. Kim, Yihwan; Samoilov, Arkadii V., Selective epitaxy process with alternating gas supply.
  37. Kim,Yihwan; Samoilov,Arkadii V., Selective epitaxy process with alternating gas supply.
  38. Ohto,Koichi; Usami,Tatsuya; Morita,Noboru; Ohnishi,Sadayuki; Arita,Koji; Kitao,Ryohei; Sasaki,Yoichi, Semiconductor device having two distinct sioch layers.
  39. Comita, Paul B.; Scudder, Lance A.; Carlson, David K., Silicon-containing layer deposition with silicon compounds.
  40. Singh, Kaushal K.; Comita, Paul B.; Scudder, Lance A.; Carlson, David K., Silicon-containing layer deposition with silicon compounds.
  41. Singh, Kaushal K.; Comita, Paul B.; Scudder, Lance A.; Carlson, David K., Silicon-containing layer deposition with silicon compounds.
  42. Ye, Zhiyuan; Kim, Yihwan; Li, Xiaowei; Zojaji, Ali; Dalida, Nicholas C.; Tang, Jinsong; Chen, Xiao; Samoilov, Arkadii V., Use of CL2 and/or HCL during silicon epitaxial film formation.
  43. Ye, Zhiyuan; Kim, Yihwan; Li, Xiaowei; Zojaji, Ali; Dalida, Nicholas C.; Tang, Jinsong; Chen, Xiao; Samoilov, Arkadii V., Use of Cl2 and/or HCl during silicon epitaxial film formation.
  44. Ye, Zhiyuan; Kim, Yihwan; Li, Xiaowei; Zojaji, Ali; Dalida, Nicholas C.; Tang, Jinsong; Chen, Xiao; Samoilov, Arkadii V., Use of Cl2 and/or HCl during silicon epitaxial film formation.

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