초록 ▼

The invention relates to an MIS transistor comprising a channel region (118), source (114) and drain (116) regions arranged on either side of the channel, and a gate (150) set closely above the channel region. According to the invention, the channel has a doped central part (140), located between th

The invention relates to an MIS transistor comprising a channel region (118), source (114) and drain (116) regions arranged on either side of the channel, and a gate (150) set closely above the channel region. According to the invention, the channel has a doped central part (140), located between the source and drain regions, and separated from said source and drain regions.

대표청구항 ▼

1. A method of manufacturing an MIS transistor on a semiconductor substrate comprising the steps of: a) forming a sacrificial dummy gate (112) on a pedestal layer (102) formed on a substrate (100), the dummy gate being set above a channel region (118) of the substrate; b) forming source and drai

1. A method of manufacturing an MIS transistor on a semiconductor substrate comprising the steps of: a) forming a sacrificial dummy gate (112) on a pedestal layer (102) formed on a substrate (100), the dummy gate being set above a channel region (118) of the substrate; b) forming source and drain regions (114, 116) in the substrate such that they are self-aligned to lateral edges of the dummy gate and define, at least in part, the channel region; c1) coating the lateral edges of the dummy gate with at least one electrical insulation substance and removing the dummy gate to obtain a well (130) above the channel region; c2) forming interior lateral spacers (122) on the sides of the well; c3) doping a part (140) of the channel region by ionic implantation in the well, using the interior lateral spacers as an implantation mask; d) forming a definitive gate (150) in the well, the definitive gate separated from the substrate by a gate insulator layer, wherein the step of forming the definitive gate is preceded by a step of removing at least a part of the pedestal layer located at the bottom of the well and at least a part of the pedestal layer (102) extending under the spacers of the sides of the well, to form at least one recess (142) above a part of the source and drain regions, the definitive gate extending into said at least on recess. 2. The method according to claim 1, wherein the step of forming the source and drain regions comprises the steps of: performing a first ionic doping implantation using the dummy gate (112) as an implantation mask, forming exterior lateral spacers (120) on the flanks of the dummy gate, performing a second ionic doping implantation using the dummy gate equipped with the exterior lateral spacers as an implantation mask. 3. The method according to claim 1 wherein before terminating step c3,a layer of oxide (134) is formed on the interior lateral spacers. 4. The method according to claim 3 wherein the oxide layer (134) is formed by cold oxidation of exposed sides of the interior lateral spacers. 5. The method according to claim 2 wherein the exterior lateral spacers (120) and the interior lateral spacers (122) are made of the same substance. 6. The method according to claim 1, further comprising, prior to the step of forming the definitive gate, the steps of: removing a portion of the pedestal layer at the bottom of the well and forming the gate insulator layer (144). 7. The method according to claim 1 wherein after elimination of said part of the pedestal layer and before setting the definitive gate in place, a new oxide layer is formed on the sides of the interior lateral spacers.