초록 ▼

The HF defect density in an SOI is reduced. An SOI having a thickness of 200 nm or less is annealed in an inert atmosphere at a temperature between the eutectic temperature (e.g., 966° C.) of a semiconductor metal compound (e.g., nickel silicide) formed from a metal and the semiconductor material of

The HF defect density in an SOI is reduced. An SOI having a thickness of 200 nm or less is annealed in an inert atmosphere at a temperature between the eutectic temperature (e.g., 966° C.) of a semiconductor metal compound (e.g., nickel silicide) formed from a metal and the semiconductor material of the crystal semiconductor of the SOI (inclusive) and the melting point of the semiconductor material (inclusive).

대표청구항 ▼

The HF defect density in an SOI is reduced. An SOI having a thickness of 200 nm or less is annealed in an inert atmosphere at a temperature between the eutectic temperature (e.g., 966° C.) of a semiconductor metal compound (e.g., nickel silicide) formed from a metal and the semiconductor material of

The HF defect density in an SOI is reduced. An SOI having a thickness of 200 nm or less is annealed in an inert atmosphere at a temperature between the eutectic temperature (e.g., 966° C.) of a semiconductor metal compound (e.g., nickel silicide) formed from a metal and the semiconductor material of the crystal semiconductor of the SOI (inclusive) and the melting point of the semiconductor material (inclusive). t., vol. 14, No. 10, Oct. 1993, pp. 466-468. Su, "Tilt Angle Effect on Optimizing HALO PMOS Performance," 1997 Int'l Conf. Simulation Semicon. Procs. and Devs., Dec. 8-10, 1997, pp. 33-36. Takeda et al., "An As-P(n+n-) Double Diffused Drain MOSFET for VLSIs," IEEE Trans. Elect. Devs., Jun. 1983, vol. ED-30, pp. 652-657. Taur et al., "High Performance 0.1 μm CMOS Devices With 1.5V Power Supply," IEDM Tech. Dig., Int'l Elect. Devs. Meeting, Dec. 5-8,