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In a method for coupling a PCB sheet, if a defective PCB is found after the manufacture of continuously arranged circuit patterns, then the defective PCB sheet portion is removed to replace it with a new PCB sheet portion. That is, a defective circuit pattern sheet is removed from continuously arran

In a method for coupling a PCB sheet, if a defective PCB is found after the manufacture of continuously arranged circuit patterns, then the defective PCB sheet portion is removed to replace it with a new PCB sheet portion. That is, a defective circuit pattern sheet is removed from continuously arranged circuit patterns of a first PCB sheet. After removal of the defective circuit pattern sheet, the first PCB sheet is position-located by a position locator. Then, the space which is formed by removing, the defective circuit pattern sheet is filled with a second PCB sheet on which a good quality circuit pattern is printed. Then, the first PCB sheet and the second PCB sheet are coupled together by using an adhesive.

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In a method for coupling a PCB sheet, if a defective PCB is found after the manufacture of continuously arranged circuit patterns, then the defective PCB sheet portion is removed to replace it with a new PCB sheet portion. That is, a defective circuit pattern sheet is removed from continuously arran

In a method for coupling a PCB sheet, if a defective PCB is found after the manufacture of continuously arranged circuit patterns, then the defective PCB sheet portion is removed to replace it with a new PCB sheet portion. That is, a defective circuit pattern sheet is removed from continuously arranged circuit patterns of a first PCB sheet. After removal of the defective circuit pattern sheet, the first PCB sheet is position-located by a position locator. Then, the space which is formed by removing, the defective circuit pattern sheet is filled with a second PCB sheet on which a good quality circuit pattern is printed. Then, the first PCB sheet and the second PCB sheet are coupled together by using an adhesive. g Pd alloy in the range of 2-10%. 12. The method of claim 7 further including Pt alloy in the range of 2-10%. 13. The method of claim 7 further including Cu alloy in the range of 2-10%. 14. A method for forming an interconnect structure between a substrate with an I/O pad and a circuit card having a conductive land, said method comprising: a) applying a solder composition paste of a first melting point to said substrate I/O pad; b) forming an intermediate assembly by loading said interconnect structure into a carrier wherein said interconnect structure is aligned with said substrate I/O pad and in position to form an array; c) heating said intermediate assembly to a temperature higher than said first melting point; d) extracting said substrate from after said interconnect structure is bonded to said substrate; e) cleaning said substrate with said interconnect structures bonded thereto; f) inserting said substrate with said interconnect structures attached to said conductive land; and g) applying a eutectic solder composition of a second melting point to said conductive land and said interconnect structure, wherein said second melting point is lower than said first melting point such that only said solder composition of said second melting point changes to a molten state. 15. The method of claim 14 further comprising applying said solder composition of said first melting point to said I/O pad of said substrate by screening mask, such that said substrate is reflowed, melting said solder composition of said first melting point and wetting said I/O pad of said substrate. 16. The method of claim 14 further comprising transferring a solder pre-form of said solder composition of said first melting point to said I/O pad of said substrate by aligning said pre-form with said I/O pad of said substrate, and heating said pre-form above said first melting point of said solder composition of said first melting point. 17. The method of claim 14 wherein said solder composition of said first melting point comprises a Pb--Sn eutectic plus Pb(33%-50%)--Sn, together totaling 90-98%, and a Pd powder in the range 2-10% and particle sizes in the range of 4-37 μm. 18. The method of claim 14 wherein said solder composition of said first melting point comprises a Pb--Sn eutectic plus Pb(33%-50%)--Sn, together totaling 80-98%, and a Pd--Sn powder in the range 2-20% and particle sizes in the range of 4-37 μm. 19. The method of claim 14 wherein said solder composition of said first melting point comprises a Pb--Sn eutectic plus Pb(33%-50%)--Sn, together totaling 90-98%, and a Pt powder in the range 2-10% and particle sizes in the range of 4-37 μm. 20. The method of claim 14 wherein said solder composition of said first melting point comprises a Pb--Sn eutectic plus Pb(33-50%)--Sn, together totaling 80-98%, and a Pt--Sn powder in the range 2-20% and particle sizes in the range of 4-37 μm. 21. The method of claim 14 wherein said solder composition of said first melting point comprises a Pb--Sn eutectic plus Pb(33%-50%)--Sn, together totaling 90-98%, and a Cu powder in the range 2-10% and particle sizes in the range of 4-37 μm. 22. The method of claim 14 wherein said solder composition of said first melting point comprises a Pb--Sn eutectic plus Pb(33%-50%)--Sn, together totaling 80-98%, and a Cu--Sn powder in the range 2-20% and particle sizes in the range of 4-37 μm. 23. The method of claim 14 wherein said solder composition of said second melting point comprises a Pb--Sn eutectic. 24. The method of claim 14 wherein said heating of said intermediate assembly comprises applying heat at a peak temperature in the range of 200-250° C. and at a dwell temperature above 183° C. for 1-10 minutes. 25. A method for detaching two substrates joined by a connector wherein said connector is bonded to a first substrate at one end with a solder composition of a first melting point comprising a combination of a Pb--Sn eutectic and a Pb--Sn alloy having sa