초록 ▼

Conductive lines, such as co-axial lines, integrated circuitry incorporating such conductive lines, and methods of forming the same are described. In one aspect, a substrate having an outer surface is provided. A masking material is formed over the outer surface and subsequently patterned to form a

Conductive lines, such as co-axial lines, integrated circuitry incorporating such conductive lines, and methods of forming the same are described. In one aspect, a substrate having an outer surface is provided. A masking material is formed over the outer surface and subsequently patterned to form a conductive line pattern. An inner conductive layer is formed within the conductive line pattern, followed by formation of a dielectric layer thereover and an outer conductive layer over the dielectric layer. Preferred implementations include forming the inner conductive layer through electroplating, or alternatively, electroless plating techniques. Other preferred implementations include forming the dielectric layer from suitable polymer materials having desired dielectric properties. A vapor-deposited dielectric layer of Parylene is one such preferred dielectric material.

대표청구항 ▼

Conductive lines, such as co-axial lines, integrated circuitry incorporating such conductive lines, and methods of forming the same are described. In one aspect, a substrate having an outer surface is provided. A masking material is formed over the outer surface and subsequently patterned to form a

Conductive lines, such as co-axial lines, integrated circuitry incorporating such conductive lines, and methods of forming the same are described. In one aspect, a substrate having an outer surface is provided. A masking material is formed over the outer surface and subsequently patterned to form a conductive line pattern. An inner conductive layer is formed within the conductive line pattern, followed by formation of a dielectric layer thereover and an outer conductive layer over the dielectric layer. Preferred implementations include forming the inner conductive layer through electroplating, or alternatively, electroless plating techniques. Other preferred implementations include forming the dielectric layer from suitable polymer materials having desired dielectric properties. A vapor-deposited dielectric layer of Parylene is one such preferred dielectric material. 8, 19950400, Quay, 424/009; US-5410516, 19950400, Uhlendorf et al., 367/007; US-5413774, 19950500, Schneider et al., 424/009.51; US-5425366, 19950600, Reinhardt et al., 128/662.02; US-5433204, 19950700, Olson, 128/661.08; US-5445813, 19950800, Schneider et al., 424/009.51; US-5456900, 19951000, Unger, 424/009.4; US-5460800, 19951000, Walters, 424/009.6; US-5469854, 19951100, Unger et al., 128/662.02; US-5470582, 19951100, Supersaxo et al., 424/489; US-5485839, 19960100, Aida et al., 128/653.1; US-5487390, 19960100, Cohen et al., 128/662.02; US-5496535, 19960300, Kirkland, 424/009.37; US-5496536, 19960300, Wolf, 424/009.322; US-5498421, 19960300, Grinstaff et al., 424/450; US-5501863, 19960300, Rossling et al., 424/489; US-5502094, 19960300, Moore et al., 524/145; US-5505932, 19960400, Grinstaff et al., 424/009.3; US-5508021, 19960400, Grinstaff et al., 424/009.322; US-5512268, 19960400, Grinstaff et al., 424/009.322; US-5514720, 19960500, Clark, Jr. et al., 514/749; US-5527521, 1996060