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[미국특허] Circuit and method for supporting multicast/broadcast operations in multi-queue storage devices 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-003/00
출원번호 US-0347046 (1999-07-02)
발명자 / 주소
  • Raza, S. Babar
출원인 / 주소
  • Cypress Semiconductor Corp.
대리인 / 주소
    Christopher P. Maiorana, P.C.
인용정보 피인용 횟수 : 6  인용 특허 : 53

초록

A circuit comprising a memory and a control circuit. The memory may be configured to (i) hold one or more packets of information and (ii) send the held packets of information in response to one or more control signals. The control circuit may be configured to generate the one or more control signals

대표청구항

A circuit comprising a memory and a control circuit. The memory may be configured to (i) hold one or more packets of information and (ii) send the held packets of information in response to one or more control signals. The control circuit may be configured to generate the one or more control signals

이 특허에 인용된 특허 (53) 인용/피인용 타임라인 분석

  1. Chao Hung-Hsiang Jonathan ; Uzun Necdet, ASIC chip for implementing a scaleable multicast ATM switch.
  2. Barnett Richard (Chelmsford GBX), ATM cell switch suitable for multicast switching.
  3. Kozaki Takahiko,JPX ; Yanagi Junichirou,JPX ; Aiki Kiyoshi,JPX ; Ito Yutaka,JPX ; Aoki Kaoru,JPX ; Gohara Shinobu,JPX, ATM cell switching system.
  4. Takahiko Kozaki JP; Junichirou Yanagi JP; Kiyoshi Aiki JP; Yutaka Ito JP; Kaoru Aoki JP; Shinobu Gohara JP, ATM cell switching system.
  5. Preas Bryan T. ; Davis Helen M. ; Bell Alan G. ; Lyles Joseph B., ATM switch with output port clustering for dynamically allocating bandwidth between ports.
  6. Oren Yair,ILX ; Doron Eitan,ILX ; Olier Albert,ILX ; Shussman Yossi,ILX ; Toy Benny Siman,ILX, ATM switching fabric.
  7. Torii Yutaka (Yokohama JPX) Mori Makoto (Yokohama JPX) Gohara Shinobu (Yokohama JPX) Ohtsuki Kenichi (Kanagawa JPX) Sakurai Yoshito (Yokohama JPX), ATM switching system.
  8. Hayter Andrew T. (Bitterne Park GB2) Davis Simon P. (Romsey GB2), Apparatus and method of processing bandwidth requirements in an ATM switch.
  9. Carbone ; Jr. Quiedo Joseph (Kingston NY) Miracle Gerald Holt (Pleasant Valley NY) Potvin Peter Lloyd (Holly Springs NC), Apparatus for repowering and monitoring serial links.
  10. Sindhu Pradeep S. (Mountain View CA) Frailong Jean-Marc (Palo Alto CA) Gastinel Jean A. (Mountain View CA), Arbitration of packet switched busses, including busses for shared memory multiprocessors.
  11. Kaufman Charles W. (Northborough MA) Perlman Radia J. (Acton MA), Architecture for maintaining the sequence of packet cells transmitted over a multicast, cell-switched network.
  12. Pashan, Mark A., Asynchronous transfer mode (ATM) switch fabric.
  13. Hauser Stephen A. ; Caldara Stephen A. ; Manning Thomas A. ; McClure Robert B., Asynchronous transfer mode based service consolidation switch.
  14. Hanaoka Hidetoshi (Kawasaki JPX), Asynchronous transfer mode switching device.
  15. Law Ka Lun,CAX ITX M2K 2Y2, Asynchronous transfer mode switching system.
  16. Min Paul S. (St. Louis MO) Saidi Hossein (St. Louis MO), Broadband multi-channel switch with multicasting capability.
  17. Sone Yukio (Kawasaki JPX) Nagashima Takashi (Yokohama JPX) Kato Takashi (Fukuoka JPX), Broadcast service system.
  18. Diaz Felix V. (Plano TX) Stanley Jack H. (Plano TX), Buffered crosspoint matrix for an asynchronous transfer mode switch and method of operation.
  19. Garcia Armando (Yorktown Heights NY) McDowell Curtis S. (Thornwood NY) Sieh Wielming (Newton MA), Centralized backplane bus arbiter for multiprocessor systems.
  20. Averill Gregory S. (Ft. Collins CO), Computer bus arbitration for N processors requiring only N unidirectional signal leads.
  21. Holland Stephen D. (Boise ID) Ingalls Charles L. (Boise ID), Controlling synchronous serial access to a multiport memory.
  22. Bass Brian M. (Wake NC) Ku Edward H. (Wake NC) Lin Bou-Chung (Wake NC) Sanaye Simin H. (Wake NC), Data processing system having dynamic priority task scheduling capabilities.
  23. Yamanaka Hideaki (Kanagawa JPX) Saito Hirotaka (Kanagawa JPX) Tsuzuki Munenori (Kanagawa JPX) Yamada Hirotoshi (Kanagawa JPX) Kondoh Harufusa (Hyogo JPX) Oshima Kazuyoshi (Kanagawa JPX) Notani Hiromi, Data queuing apparatus and ATM cell switch based on shifting and searching.
  24. Meinecke Jon M. (Denton TX) VanBuskirk Michael R. (Plano TX), Data transfer system between a computer and a host adapter using multiple arrays.
  25. Tout Arthur James Viggo,GBX ; Johnson Stephen Mark,GBX, Digital switch.
  26. Ghani Nasir ; Dixit Sudhir Sharan, Enhanced acknowledgment pacing device and method for TCP connections.
  27. Vanbuskirk Michael R. (Plano TX) Meinecke Jon M. (Denton TX), Expandable communication system with data flow control.
  28. Headrick Kent H. ; Devarajan Kannan, High speed packet-switched digital switch and method.
  29. Calvignac Jean (La Gaude FRX) Saint Georges Eric (La Gaude FRX) Orsatti Daniel (Cagnes sur Mer FRX) Toubol Gilles (Villeneuve Loubet FRX) Verplanken Fabrice (Le Haute de Cagnes FRX) Nicolas Francois , Hybrid switching system for a communication node.
  30. Isfeld Mark S. (San Jose CA) Bowman Michael H. (Palo Alto CA) Strohl Niles E. (Tracy CA), Input/output bus architecture with parallel arbitration.
  31. Bartoldus Robert William ; Bass Brian Mitchell ; Potter ; Jr. Kenneth H. ; Troop William Craig, LAN switch with distributed copy function.
  32. Munter Ernst A. (Kanata CAX), Large capacity modular ATM switch.
  33. Smiroldo Michael (Belmont CA), Method and apparatus for managing a number of time slots during which plural bidding devices can request communication a.
  34. Roy Subhash C. ; Parrella Eugene L. ; Ramsden Ian, Method and apparatus for managing multiple ATM cell queues.
  35. Baumert Robert J. ; Seaman Anthony W. ; Staves Sherre M., Method and apparatus for optimizing the transfer of data packets between local area networks.
  36. Prince Jeff ; Noll Mike ; Ferguson Earl ; Johnson Bobby ; Ryals Randy, Method and apparatus for transmitting cells across an ATM switch bus.
  37. Abefelt Eric O. (Vallingby SEX) Schyman Lars G. (Tumba SEX) Lundh Carl P. B. (Farsta SEX), Method of distinguishing in serial digital bit streams between at least two types of time slots in a bit stream receiver.
  38. Calvignac Jean L. J. (LaGaude FRX) Feraud Jacques M. C. (LaGaude FRX) Munier Jean-Marie L. (Cagnes sur Mer FRX), Multiplex interface for a communication controller.
  39. McLaury Loren L. (Boise ID), Multiport memory with pipelined serial input.
  40. McLaury Loren L. (Boise ID), Multiport memory with pipelined serial input.
  41. Myers Mark ; Lloyd Stacey ; Stout Richard ; Takasumi Robert ; Lynch John, Multiprocessor computer backlane bus.
  42. Myers Mark (Portland OR) Lloyd Stacey (Hillsboro OR) Stout Richard (Tualatin OR) Takasumi Robert (Hillsboro OR) Lynch John (Portland OR), Multiprocessor computer backplane bus in which bus transactions are classified into different classes for arbitration.
  43. Dai William ; Chao Jason ; Shih Cheng-chung, Packet switching fabric using the segmented ring with resource reservation control.
  44. Opher Ayal (Mountain View CA) Garg Gaurav (Mountain View CA) Kruzinski Philip (Redwood City CA) Sikdar Som (San Jose CA), Routing device utilizing an ATM switch as a multi-channel backplane in a communication network.
  45. Venkataraman Krishnan, Scalable high performance switch element for a shared memory packet or ATM cell switch fabric.
  46. Adkins John T. (San Antonio TX) Pogorzelski James S. (Georgetown TX) Wilson Jacqueline H. (Austin TX), Scalable schedules for serial communications controller in data processing systems.
  47. Chao Hung-Hsiang Jonathan ; Choe Byeong-Seog,KRX, Scaleable multicast ATM switch.
  48. Wicklund Goran,SEX, Scheduler for an information packet switch.
  49. Devon Mark (San Jose CA) Lynch John (San Jose CA) Nichols James B. (San Mateo CA), Serial I/O device identifies itself to a computer through a serial interface during power on reset then it is being conf.
  50. Kunimoto Masao (Yokohama JPX) Kashio Jiro (Kawasaki JPX) Mori Makoto (Yokohama JPX) Gohara Shinobu (Yokohama JPX), Signalling apparatus for use in an ATM switching system.
  51. Shachar Boaz (Givatayim ILX) Rozen Nahum (Natanya ILX) Yeivin Yoram (Petah Tikva ILX) Wietz Eli (Hucon ILX), Synchronization of transparent TDM superchannels.
  52. Kim Sungjoon,KRX ; Lee David D. ; Jeong Deog-Kyoon,KRX, System and method for sending multiple data signals over a serial link.
  53. Mensch ; Jr. William D. (1924 E. Hope St. Mesa AZ 85203), Topography for CMOS microcomputer.

이 특허를 인용한 특허 (6) 인용/피인용 타임라인 분석

  1. Ori, Zivan, Distributed storage over shared multi-queued storage device.
  2. Friedman, Alex; Pinhas, Barak; Budilovsky, Evgeny, Lockless distributed redundant storage and NVRAM caching of compressed data in a highly-distributed shared topology with direct memory access capable interconnect.
  3. Chau, Benson; Banga, Kanwal Preet; Huang, Frank; Luo, Xiaohua; Yeung, Ken, Method and apparatus for transferring data between a host and an embedded device.
  4. Zhang, Ming; Chen, Yung-Chin; Warkhedi, Abhijit, Multiple update frequencies for counters in a multi-level shaping system.
  5. Friedman, Alex, Storage in multi-queue storage devices using queue multiplexing and access control.
  6. Friedman, Alex; Liakhovetsky, Alex; Divinsky, Yoni; Budilovsky, Evgeny; Gonshorovitz, Itay; Pinhas, Barak, Write cache and write-hole recovery in distributed raid over shared multi-queue storage devices.

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