초록 ▼

The invention concerns apparatus for blending and dispensing food products within a container, which may be disposable. The container 1 is charged with food product through its upper opening which is then sealed with a closure member 2. The closure member 2 may carry a blender 7 when it closes the c

The invention concerns apparatus for blending and dispensing food products within a container, which may be disposable. The container 1 is charged with food product through its upper opening which is then sealed with a closure member 2. The closure member 2 may carry a blender 7 when it closes the container. Alternatively, the blender may be admitted through the closure member 2 when blending is required. In each case the blender is moveable up and down relative to the container to blend the product in the container.

대표청구항 ▼

The invention concerns apparatus for blending and dispensing food products within a container, which may be disposable. The container 1 is charged with food product through its upper opening which is then sealed with a closure member 2. The closure member 2 may carry a blender 7 when it closes the c

The invention concerns apparatus for blending and dispensing food products within a container, which may be disposable. The container 1 is charged with food product through its upper opening which is then sealed with a closure member 2. The closure member 2 may carry a blender 7 when it closes the container. Alternatively, the blender may be admitted through the closure member 2 when blending is required. In each case the blender is moveable up and down relative to the container to blend the product in the container. number of switching devices, each having: a serial input, a test point input, and a switch output coupled to the serial input when in a first state, and coupled to the test point input when in a second state; n number of bit registers, each having a data input and a data output, the data input of x number of the bit registers coupled to the switch output of a corresponding one of the x number of switching devices; a serial print data input for receiving a serial string of bits of the print data; x number of test points coupled to the test point inputs of the x number of switching devices, the x number of test points for receiving x number of parallel bits of the test point data; and a test data output coupled to the data output of an nth of the n number of bit registers, the test data output for outputting a serial string of the x number of bits of the test point data, where x is less than or equal to n. 2. The ink jet print head integrated circuit of claim 1 wherein x equals n, the data outputs of n-1 of the n number of bit registers are coupled to the serial inputs of n-1 of the x number of switching devices, and the serial print data input is coupled to the serial input of a first of the x number of switching devices. 3. The ink jet print head integrated circuit of claim 1 further comprising: the n number of bit registers each having a register clock input; and a first clock input coupled to the register clock input of each of the n number of bit registers, the first clock input for receiving a first clock signal for shifting the bits of print data or the bits of test point data through the n number of bit registers. 4. The ink jet print head integrated circuit of claim 1 further comprising: the x number of switching devices each having a switch clock input; and a second clock input coupled to the switch clock input of each of the x number of bit switching devices, the second clock input for receiving a second clock signal for causing the x number of switching devices to switch between the first and second states. 5. The ink jet print head integrated circuit of claim 1 further comprising y number of latch circuits, where y is less than or equal to n, each of the latch circuits having: a latch input coupled to the data output of one of the n number of bit registers; and a latch output. 6. The ink jet print head integrated circuit of claim 5 further comprising: the y number of latch circuits each having a latch clock input; and a second clock input coupled to the latch clock input of each of the y number of latch circuits, the second clock input for receiving a second clock signal for causing the y number of latch circuits to latch bits of print data from the data outputs of y number of the bit registers. 7. The ink jet print head integrated circuit of claim 6 further comprising: the x number of switching devices each having a switch clock input; and the second clock input coupled to the switch clock input of each of the x number of switching devices, the second clock input further for receiving the second clock signal for causing the x number of switching devices to switch between the first and second states. 8. An ink jet print head integrated circuit for receiving print data related to an image to be printed, and for receiving test point data for testing internal logic nodes of the circuit, the circuit comprising: a shift register having: a serial print data input for receiving bits of the print data in a serial string; a plurality of parallel print data outputs for outputting the bits of print data in parallel; a plurality of test point inputs for receiving bits of the test point data in parallel; and a serial test data output for outputting a serial string of the bits of the test point data; and a plurality of latch circuits, each having: a latch input coupled to a corresponding one of the parallel print data outputs; and a latch output. 9. The ink jet print head