초록 ▼

A technique is provided for generating one or more XML documents from a single SQL query. Data stored on a data storage device that is connected to a computer is transformed. A query is received that selects data stored in a relational database management system on the data storage device, wherein a

A technique is provided for generating one or more XML documents from a single SQL query. Data stored on a data storage device that is connected to a computer is transformed. A query is received that selects data stored in a relational database management system on the data storage device, wherein a data access definition defines: (1) a collection of one or more tables in the relational database management system for storing attributes from an XML document, (2) how data stored in the tables maps to the XML document, (3) a query for mapping the data stored in the tables to the XML document, and (4) a table that will contain the XML document after the XML document is generated. Then, one or more XML documents are generated from the selected data using the data access definition.

대표청구항 ▼

A technique is provided for generating one or more XML documents from a single SQL query. Data stored on a data storage device that is connected to a computer is transformed. A query is received that selects data stored in a relational database management system on the data storage device, wherein a

A technique is provided for generating one or more XML documents from a single SQL query. Data stored on a data storage device that is connected to a computer is transformed. A query is received that selects data stored in a relational database management system on the data storage device, wherein a data access definition defines: (1) a collection of one or more tables in the relational database management system for storing attributes from an XML document, (2) how data stored in the tables maps to the XML document, (3) a query for mapping the data stored in the tables to the XML document, and (4) a table that will contain the XML document after the XML document is generated. Then, one or more XML documents are generated from the selected data using the data access definition. impedance. 5. The circuit of claim 1, wherein the output driver circuit forms a voltage divider circuit with the output stage to form the output voltage of the output stage. 6. The circuit of claim 5, wherein the output driver circuit is on a chip, and the output stage is used to match a target impedance, and completes a circuit path from a power supply on the chip, through the output driver circuit, through activated calibration transistor devices in the output stage, to the chip ground. 7. The circuit of claim 1, wherein the output driver impedance calibration circuit comprises: a plurality of series of delay elements, one for each of the plurality of calibration transistor devices in the output stage, and an input update signal is propagated in series through each of the plurality of series of delay elements and turns on each of the plurality of calibration transistor devices in sequence, causing an output voltage at an output node of the output stage to change in a monotonically changing fashion; the voltage comparator circuit has the monotonically changing output voltage as a first input voltage and the target reference voltage as a second input voltage, which is the voltage at which the output stage is within a desired tolerance of a target external precision impedance; a set of latches, one for each of the plurality of transistor devices and when the voltage comparator circuit output voltage changes state, the gate voltage states of each of the plurality of transistor devices are stored in the set of latches. 8. The circuit of claim 7, wherein the output driver circuit is on a chip with other calibrated output driver circuits, and after the input update signal has propagated through the last delay element, the states of the set of latches are stored, and are transferred to gates of corresponding transistor devices of other calibrated output driver circuits on the same chip. 9. The circuit of claim 8, wherein the states of the set of latches are transferred to a second set of latches, from which they are transferred as outputs to the gates of corresponding transistor devices of the other calibrated output driver circuits on the same chip. 10. The circuit of claim 1, wherein the output driver circuit comprises a CMOS output driver stage which comprises a base PFET pull-up transistor device, a base NFET pull-down transistor device, and an output stage transistor R leading to an output node. 11. The circuit of claim 10, wherein a state of calibration is outputted to other output driver NFET pull-down output driver circuits and PFET pull-up output driver circuits on the same chip which require a calibrated output and have the same output impedance. 12. The circuit of claim 10, wherein the output driver circuit comprises a pull-up stage and a pull-down stage, and the output driver impedance calibration circuit comprises a pull-down calibration circuit, and a pull-up calibration circuit. 13. The circuit of claim 12, wherein an update input signal is propagated through a series of delay elements in each of the pull-down and pull-up calibration circuits to activate in sequence the base transistor device and the plurality of calibration transistor devices. 14. The circuit of claim 1, wherein the output driver circuit is on a chip with a plurality of corresponding output driver circuits, and the output of the output driver impedance calibration circuit is used to make a plurality of off chip driver characteristics, for the plurality of corresponding output driver circuits.